Dr. Juan Andres Torres
Distinguished Engineer at Siemens EDA
SPIE Involvement:
Author | Instructor
Publications (65)

Proceedings Article | 28 April 2023 Paper
Proceedings Volume 12495, 124951V (2023) https://doi.org/10.1117/12.2661150
KEYWORDS: Data modeling, Semiconducting wafers, Metrology, Modeling, Machine learning, Fabrication, Data processing, Semiconductors, Process modeling, Deposition processes

Proceedings Article | 27 April 2023 Paper
Proceedings Volume 12496, 124963J (2023) https://doi.org/10.1117/12.2662880
KEYWORDS: Reliability, Semiconducting wafers, Data modeling, Manufacturing, Fabrication, Semiconductors, Industry, High volume manufacturing, Model-based design, Metrology

Proceedings Article | 26 May 2022 Paper
Proceedings Volume 12053, 120531B (2022) https://doi.org/10.1117/12.2614943
KEYWORDS: Process modeling, Process control, Metrology, Calibration, Semiconducting wafers, Neodymium, Error analysis, Control systems, Semiconductors, Machine learning

Proceedings Article | 22 February 2021 Presentation + Paper
Proceedings Volume 11611, 116112D (2021) https://doi.org/10.1117/12.2588467
KEYWORDS: Metrology, Bridges, Manufacturing, Data modeling, Time metrology, Semiconducting wafers, Reticles, Internet, Design for manufacturability, Data integration

SPIE Journal Paper | 23 March 2018
JM3, Vol. 17, Issue 01, 013508, (March 2018) https://doi.org/10.1117/12.10.1117/1.JMM.17.1.013508
KEYWORDS: Directed self assembly, Connectors, Global Positioning System, Curium, Model-based design, Detection and tracking algorithms, Calibration, Monte Carlo methods, Data modeling, Failure analysis

Showing 5 of 65 publications
Conference Committee Involvement (2)
3 November 2014 |
Design Automation Conference
1 June 2014 |
Course Instructor
SC1101: Understanding Design-Patterning Interactions
This course explains how layout and circuit design interact with lithography choices. We especially focus on multi-patterning technologies such as LELE double patterning and SADP. We will explore role of design in lithography technology development as well as in lithographic process control. We will further discuss design enablement of multi-patterning technologies, especially in context of cell-based digital designs.
SC1187: Understanding Design-Patterning Interactions for EUV and DSA
EUV lithography and DSA haven been accepted by the industry as most promising candidates for dimensional scaling enablement at N7 technology node and beyond. This tutorial explains how introduction of such lithography technologies going to impact layout and circuit design. Choices of lithography would impact physical design and have a significant impact at system level. This tutorial will focus on transition from 193i multi-patterning technologies to EUV lithography and DSA. Factors that would determine on the enablement of these technologies would be highlighted and possible solutions would be shared.
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