Yield has always been a driving consideration during fabrication of modern semiconductor industry. Statistically, the
largest portion of wafer yield loss is defective scan failure. This paper presents efficient failure analysis methods for
initial yield ramp up and ongoing product with scan diagnosis. Result of our analysis shows that more than 60% of the
scan failure dies fall into the category of shift mode in the very deep submicron (VDSM) devices. However, localization
of scan shift mode failure is very difficult in comparison to capture mode failure because it is caused by the malfunction
of scan chain. Addressing the biggest challenge, we propose the most suitable analysis method according to scan failure
mode (capture / shift) for yield enhancement. In the event of capture failure mode, this paper describes the method that
integrates scan diagnosis flow and backside probing technology to obtain more accurate candidates. We also describe
several unique techniques, such as bulk back-grinding solution, efficient backside probing and signal analysis method.
Lastly, we introduce blocked chain analysis algorithm for efficient analysis of shift failure mode. In this paper, we
contribute to enhancement of the yield as a result of the combination of two methods. We confirm the failure candidates
with physical failure analysis (PFA) method. The direct feedback of the defective visualization is useful to mass-produce
devices in a shorter time. The experimental data on mass products show that our method produces average reduction by
13.7% in defective SCAN & SRAM-BIST failure rates and by 18.2% in wafer yield rates.