The preparation of mesa-type InSb infrared focal plane detectors based on Be ion implantation was studied. The conventional furnace annealing of 350°C for 60 minutes was used to repair the lattice damage due to the implantation. The as-annealed InSb wafers were fabricated into InSb 128×128 array focal plane arrays with pixel size of 50 μm. The current-voltage and imaging characterization shows that the average peak detectivity reaches as high as 7.48×10<sup>10</sup> cm·Hz<sup>1/2</sup>/W, with bad pixel ratio of < 0.5% and NETD of 28mK were achieved, implying the InSb detectors by Be implantation has considerable performance with diffusion ones.
A method of passivation of etch-thinned bulk InSb by anodic oxide grown by wet anodization and vacuum deposition of SiNx layers have been investigated Thinned bulk n-type InSb with (111) orientation forms distinctively two types of interfaces on the indium and antimony faces, respectively. The junctions are diffused on the indium face. The paper presents the process and characterization for surface passivation of the backside illuminated Sb face that absorbs the photons. The surface passivation and the interfaces are characterized with Metal-Insulator-Semiconductor (MIS) devices. The effect of anodic oxide/SiNx passivation was compared to SiNx passivation. The electrical features observed in the C-V curves of MIS structures indicate that anodic oxide grown by wet anodization has the better effect on reducing the surface states and surface recombination velocity. The low-frequency-like response in the inversion region of the C-V curves was explained in view of the oxidation states of In and Sb. Finally, by growing the 30nm anodic oxide and depositing 400nm SiNx on diode structure of InSb, the performance of FPA in this case was compared with the SiNx only method. The results showed the performance of device is better than for the SiNx only method.
In manufacturing of InSb focal plane detector, InSb chip have to be polished from backside to reduce its thickness and then be plated a layer of coating to decrease its reflection (enhance its transmittance) for infrared ray. Moreover, the anti-reflection coating has to be multilayer for more anti-reflection bandwidth. In this article, it is introduced that the optimal design of triple layer λ/4 anti-reflection coating——the anodic oxide, SiNx and MgF<sub>2</sub>. The best thickness range of each layer and its theoretical reflective index are calculated from simulation software, until the refractive index of each layer has been measured by ellipsometer. And then the transmissivity and reflectivity of the triple layer coating are measured for testing and verifying its performance on the transmittance and reflection. In the end, the anti-reflective effect of the triple layer coating and monolayer SiNx coating are respectively measured and compared by infrared focal plane array measurement system. And it is showed that this triple layer coating achieved more anti-reflection bandwidth and better anti reflective effect.
In the hybrid InSb focal plane arrays(FPAs) chip fabrication process, the fracture of chips under thermal shock is the
main factor of InSb FPA chip failure and the yield of InSb FPAs chip has been limited by the high fracture probability. In
this paper, a novel equipment for thermal shock experiment has been designed. Using this equipment, the thermal shock
experiment on InSb FPAs was carried out and the position and distribution of cracks in InSb FPAs chip was obtained. It
was found that thermal mismatch stress and process damage are two main causes responsible for InSb FPAs chip’s
fracture by analyzing crack and process factors. By selecting suitable underfill materials, optimizing the curing process,
controlling the feed rate of wafer cutting,reducing thermal mismatch stress and avoiding the process damage induced in
process, the cracking probability of InSb FPAs chip has been decreased.Thus, the yield of InSb FPAs chip was increased