With the persistent drive to enable EUV lithography (EUVL) for the continuation of pattern scaling and the close collaborations between suppliers and customers, tremendous progress has been made in the last five years in EUV mask infrastructure development. With the advent of actinic pattern mask inspection (APMI) tool, the only remaining EUV mask infrastructure gap until recently has been closed. We will present real-case examples from inspection of 7nm and 5nm logic node EUV masks with APMI in operation at Intel mask shop and demonstrate that actinic inspection provides defect detection capability beyond the traditional DUV optical and e-beam mask inspection (EBMI) tools for defect control and the guaranty of mask quality. In addition to the main focus on APMI and through-pellicle inspection in this paper, we also provide a brief discussion of other key EUV infrastructure modules for mask production in current EUVL at 0.33NA and future technology extension to enable high NA EUVL at 0.55NA.
The industry is transitioning EUV lithography from feasibility phase to technology development. EUV mask infrastructure
needs to be prepared to support the technology development and ready to enable the implementation of EUV lithography
for production. In this paper, we review the current status and assess the readiness of key infrastructure modules in EUV
mask fabrication, inspection and control, and usage in a mask cycle: blank quality and inspection, pattern inspection, defect
disposition and repair, pellicle integration, and handling of pelliclized masks.
Alternating Phase Shift Mask (APSM) Technology has been developed and successfully implemented for the poly gate of 65nm node Logic application at Intel. This paper discusses the optimization of the mask design rules and fabrication process in order to enable high volume manufacturability. Intel's APSM technology is based on a dual sided trenched architecture. To meet the stringent OPC requirements associated with patterning of narrow gates required for the 65nm node, Chrome width between the Zero and Pi aperture need to be minimized. Additionally, APSM lithography has an inherently low MEEF that furthermore, drives a narrower Chrome line as compared to the Binary approach. The double sided trenched structure with narrow Chrome lines are mechanically vulnerable and prone to damage when exposed to conventional mask processing steps. Therefore, new processing approaches were developed to minimize the damage to the patterned mask features. For example, cleaning processes were optimized to minimize Chrome & quartz damage while retaining the cleaning effectiveness. In addition, mask design rules were developed which ensured manufacturability. The narrow Chrome regions between the zero and Pi apertures severely restrict the tolerance for the placement of the second level resists edges with respect to the first level. UV Laser Writer based resist patterning capability, capable of providing the required Overlay tolerance, was developed, An AIMS based methodology was used to optimize the undercut and minimize the aerial image CD difference between the Zero and Pi apertures.
Alternating phase shift mask (APSM) techniques help bridge the significant gap between the lithography wavelength and the patterning of minimum features, specifically, the poly line of 35 nm gate length (1x) in Intel's 65 nm technology. One of key steps in making APSM mask is to pattern to within the design tolerances the 2nd level resist so that the zero-phase apertures will be protected by the resist and the pi-phase apertures will be wide open for quartz etch. The ability to align the 2nd level to the 1st level binary pattern, i.e. the 2nd level overlay capability is very important, so is the capability of measuring the overlay accurately. Poor overlay could cause so-called the encroachment after quartz etch, producing undesired quartz bumps in the pi-apertures or quartz pits in the zero-apertures. In this paper, a simple, low-cost optical setup for the 2nd level DC (develop check) overlay measurements in the high volume manufacturing (HVM) of APSM masks is presented. By removing systematic errors in overlay associated with TIS and MIS (tool-induced shift and Mask-process induced shift), it is shown that this setup is capable of supporting the measurement of DC overlay with a tolerance as small as +/- 25 nm. The outstanding issues, such as DC overlay error component analysis, DC - FC (final check) overlay correlation and the overlay linearity (periphery vs. indie), are discussed.
Alternating phase shift mask (altPSM) as a strong resolution enhancement technique is increasingly required to meet the tighter lithographic requirements on gate critical dimension (CD) control, depth of focus and low k1 applications in full chip patterning of logic and memory devices. While the frequency doubling mechanism of altPSM benefits the quality of imaging, the inherent intensity asymmetry between phase shifters, or image imbalance, causes line shift. The effect of mask topography on electromagnetic wave propagation must be compensated in practice. Various designs of mask structure for correcting the intrinsic imaging asymmetry have been extensively studied. In this paper, we discuss several image imbalance correction methods for hidden phase edge altPSM architectures, including chrome undercut, shifter width sizing, sidewall chrome alternating aperture mask. We compared both hidden phase edge as well as exposed phase edge altPSM in terms of scalability, image correction effectiveness, and manufacturability for 90-nm, 65-nm technology nodes and beyond. Specifically, we define the altPSM architecture scalability in terms of three key components: 1. Mask manufacturability, design layout complexity, and effectiveness of image balance correction, 2. Mask patterning resolution, pattern fidelity, image placement, CD & overlay control at both chrome and glass levels, 3. Tightening quartz etch process control for given phase error tolerance. Applications of altPSM technology to line/space, hole, and phase shifted assisted features patterning with various altPSM architectures are also addressed.
We have compared the optical loss characteristics of polyimide waveguides derived from three different polyimide samples. We observed significant differences in the waveguiding characteristics (at 0. 8 Rm) of these samples. The photosensitive preimidized samples exhibited the best waveguiding characteristics with losses below the detection limit (0. 5 dB/cm) in some instances. Various processing conditions such as the curing affected all three samples but to a different extent. The photosensitive polyamic acid ester based samples exhibited the maximum sensitivity to the curing temperature and the heating rate. Optical losses in the preimidized photosensitive polyimide films remained low (less than 1. 0 dB/cm) even after a 350 C baking step.
Planar Waveguides were fabricated from three polyimide samples
differing significantly in terms of their precursor and curing
chemistry. The samples were selected from the groups of
non-photosensitive preimidized, photosensitive preimidized and
photosensitive polyamic ester precursor based polyimides. We observed
significant differences in the waveguiding characteristics of these
films which demonstrate the critical role of precursor chemistry on
the optical properties. Curing conditions such as heating rate and
bake duration also affected the optical properties. A scattering
loss of less than 0.7 dB/cm was measured for waveguides fabricated
from the photosensitive preimidized samples. On the other hand the
photosensitive polyamic ester bas,ed samples registered a loss of
greater than 1.5 dB/cm. In general the scattering loss increased with
the bake temperature. The magnitude of the increase was much higher
for the photosensitive polyamic ester based samples. UV exposure
also affected the waveguiding characteristics and caused formation
of scattering centers as evidenced by the increase in the scattering
losses associated with these waveguides. Planar waveguides based on
photosensitive preimidized precursor, retained excellent lightguiding
properties even after high processing temperatures (Optical losses in
these waveguides remained below 1.0 dB/cm after a 300 °C bake).