With the continued shrink of integrated circuit fabrication groundrules, the achievement of good critical dimension
(CD) control becomes more and more dependent on optical proximity correction (OPC). Current simulation
capabilities involve a first principle aerial image simulation algorithm, such as the transmission cross coefficient
(TCC) algorithm, and a resist model, which captures the dynamics of the chemical amplification and the developing
process. In the past few years, it has been found that the key photolithographic parameters, such as, the exposure
latitude (EL) and the mask error factor (MEF) for the dense features can be very accurately simulated by the
algorithm in which the latent image are made by simple Gaussian diffusion of the aerial image. However, more
detailed comparison between the simulation and experiment in isolated features, or two-dimensional features
indicates that the current modeling algorithm is still not good enough. This may have resulted in the fact that even
advanced model based OPC may require hundreds, even more than a thousand experimental data points for model
building. In addition, the model made with such endeavor does not usually extend well beyond the minimum
groundrule, which can cause sub-groundrule test structures to fail. We have studied one process parameter of the
photoresists, the MEF, and we found that a single Gaussian can not explain well the CD behavior and it seems that
such difference varies with different resists. The effective diffusion length of some resists are found to vary with line
to space ratio within a dense pitch.
Missing via has been a very annoying defect in semiconductor manufacture especially to foundry. Its solution can be rather attractive in yield improvement for relatively mature technology since each percentage point improvement will mean significant profit margin enhancement. However, the root cause for the missing via defect is not easy find since many factors, such as, defocus, material re-deposition, and inadequate developing can lead to missing via defects. Therefore, being able to know the exact cause for each defect type is the key to the solution of the problem. In this paper, we will present the analysis methodology used in our company. In the experiments, we have observed three types of missing vias. The first type consists of large areas, usually circular, of missing patterns, which are primarily located near wafer edge. The second type consists of isolated sites with single partially opened vias or completely unopened vias. The third type consists of relatively small circular areas, within which the entire via pattern is missing. We have first tried the optimization of the developing recipe and found that the first type missing via can be largely removed through the tuning of the rinse process, which improves the cleaning efficiency of the developing residue. However, this method does not remove the missing via of the second type, or the third type. For the second type missing via, we have found that it is related to local defocus caused by topographical distribution. To resolve the third type missing via defects, we have performed extensive experiments with different types of developer nozzles and different types of photomasks and the result is that we have not found any distinct dependence of the defect density to either the nozzle and mask types. Besides, we have also studied the defect density from three resists with different resolution capability and we found a correlation between the defect density and the resist resolution. It seems that, in general, lower resolution resist also has lower defect density and the results will be presented in the paper.