Quality assurance of banknote printing plates is an important issue for the corporation which produces them. Every plate must be checked carefully and entirely before it's sent to the banknote printing factory. Previously the work is done by specific workers, usually with the help of powder and magnifiers, and often lasts for 3 to 4 hours for a 5*7 plate with the size of about 650*500 square millimeters. Now we have developed an automatic inspecting system to replace human work. The system mainly includes a stable platform, an electrical subsystem and an inspecting subsystem. A microscope held by the crossbeam can move around in the x-y-z space over the platform. A digital camera combined with the microscope captures gray digital images of the plate. The size of each digital image is 2672*4008, and each pixel corresponds to about 2.9*2.9 square microns area of the plate. The plate is inspected by each unit, and corresponding images are captured at the same relative position. Thousands of images are captured for one plate (for example, 4200 (120*5*7) for a 5*7 plate). The inspecting model images are generated from images of qualified plates, and then used to inspect indeterminate plates. The system costs about 64 minutes to inspect a plate, and identifies obvious defects.
Proc. SPIE. 9045, 2013 International Conference on Optical Instruments and Technology: Optoelectronic Imaging and Processing Technology
KEYWORDS: Digital signal processing, Image processing, Inspection, Field programmable gate arrays, Image sensors, Signal processing, Image transmission, Image storage, Data conversion, Algorithm development
In high-speed banknote sorting system, to real-time deal with massive data and complex algorithm is required. This paper proposes an embedded processing system, which realizing the high-speed image acquisition and real-time processing of banknote image. The system is a customized and flexible architecture consisting of one large scale FPGA and four high performance DSP chips. The five processors have good communication with each other by RapidIO BUS. After evaluating the system-calculating overhead, the data throughput, and the hardware characteristics, we presents the whole processing program systematically running in FPGA and DSPs. In order to make full use of the advantage of FPGA highly parallelism and DSP deeply pipeline, the FPGA is designed for running parallel algorithms with large amount of calculation but low complexity of control flow, and the rest of algorithms are assigned to the four DSPs relatively. Finally, the whole program of image processing at the speed of 40 frames per second is realized on the embedded processing platform. The system has been successfully used in high-speed banknote sorting device, which has showed stable and reliable properties. And it also has excellent performance in processing ability with the verification of large scale operation.