A new method for controlling the groove profiles of diffraction gratings which changes the etching angle and etching time, meanwhile divides the etching area in the substrate into multi-layers to have a good approximation for the theory is introduced. We put forward a multi-layers etching model on the base of the ion bean sputtering (IBS) which can calculate the etching time and etching angle. We test the curved grooves profiles and get the optimizations for the number of the multi-layers, etching time and etching time in this model. Also a photoresist grating is applied for the etching experiment. The results indicate that the optimized parameters such as the number of the multi-layers result in a smaller root mean square deviation (RMSD) between the theory and the real etching result which show good agreement with the theoretical groove within the variation of ±6% of the etching rate. The simulation predictions and experimental results show that the multi-layers etching model to control the groove profiles of diffraction gratings is available.
We proposed a technique for conducting on-the-fly fine adjustment of etch depths with sub-nanometer precision during the course of ion beam etching (IBE). Simulations were performed to evaluate the etch-depth control precision. The simulation prediction shows that the precision of fine control of etch depths is at the level of 0.1nm. The preliminary experiment was conducted. The early result and the simulation prediction are in agreement with each other, which indicates that this approach is feasible for finely controlling groove-depth variations of large-area diffraction gratings.
The authors report a new process combining interference lithography with potassium hydroxide (KOH) anisotropic etch
technique for fabrication of high aspect ratio silicon gratings on (110) oriented silicon wafers. This new process has the
ability in fabricating high aspect ratio silicon gratings with extremely smooth sidewalls over a large sample area. An
alignment method was developed to align interference fringes to the vertical (111) planes of (110) oriented wafers. In
addition, a room temperature etch process with 50 wt % KOH solution was chosen to finally get an etch anisotropy of 188.
Better etch uniformity was achieved by adding a surfactant to the aqueous KOH to promote the release of hydrogen bubbles.
To increase latitude in KOH etching process, deposition of aluminum under a sloped angle with respect to the grating
structures was utilized to obtain a high duty cycle nitride mask. To prevent the collapse of high aspect ratio grating
structures caused by surface tension, a liquid carbon dioxide supercritical point dryer was used in the drying process. The
authors successfully fabricated 320nm period gratings with aspect ratio up to 100 on 5-μm-thick silicon membranes on
(110) oriented silicon-on-insulator wafers. The sample area is about 50 mm × 60 mm. The roughness (root mean square)
of the sidewall is about 0.267 nm.