For full commercialization, extreme ultraviolet lithography (EUVL) technology requires the availability of EUV mask blanks that are free of defects. This remains one of the main impediments to the implementation of EUV at the 22 nm node and beyond. Consensus is building that a few small defects can be mitigated during mask patterning, but defects over 100 nm (SiO2 equivalent) in size are considered potential “killer” defects or defects large enough that the mask blank would not be usable. The current defect performance of the ion beam sputter deposition (IBD) tool will be discussed and the progress achieved to date in the reduction of large size defects will be summarized, including a description of the main sources of defects and their composition.
We reported that we were successful in our 45nm technology node device demonstration in February 2008 and 22nm
node technology node device patterning in February 2009 using ASML's Alpha Demo Tool (ADT).1, 2, 3 In order to
insert extreme ultraviolet (EUV) lithography at the 15nm technology node and beyond, we have thoroughly
characterized one EUV mask, a so-called NOVACD mask.
In this paper, we report on three topics. The first topic is an analysis of line edge roughness (LER) using a mask
Scanning Electron Microscope (SEM), an Atomic Force Microscope (AFM) and the Actinic Inspection Tool (AIT) to
compare resist images printed with the ASML ADT. The results of the analysis show a good correlation between the
mask AFM and the mask SEM measurements. However, the resist printing results for the isolated space patterns are
slightly different. The cause of this discrepancy may be resist blur, image log slope and SEM image quality and so on.
The second topic is an analysis of mask topography using an AFM and relative reflectivity of mirror and absorber
surface using the AIT. The AFM data show 6 and 7 angstrom rms roughness for mirror and absorber, respectively. The
reflectivity measurements show that the mirror reflects EUV light about 20 times higher than absorber.
The last topic is an analysis of a 32nm technology node SRAM cell which includes a comparison of mask SEM image,
AIT image, resist image and simulation results. The ADT images of the SRAM pattern were of high quality even though
the mask patters were not corrected for OPC or any EUV-specific effects. Image simulation results were in good
agreement with the printing results.
For successful implementation of extreme ultraviolet lithography (EUVL) technology for late cycle insertion at 32 nm
half-pitch (hp) and full introduction for 22 nm hp high volume production, the mask development infrastructure must be
in place by 2010. The central element of the mask infrastructure is contamination-free reticle handling and protection.
Today, the industry has already developed and balloted an EUV pod standard for shipping, transporting, transferring,
and storing EUV masks. We have previously demonstrated that the EUV pod reticle handling method represents the best
approach in meeting EUVL high volume production requirements, based on then state-of-the-art inspection capability at
~53nm polystyrene latex (PSL) equivalent sensitivity. In this paper, we will present our latest data to show defect-free
reticle handling is achievable down to 40 nm particle sizes, using the same EUV pod carriers as in the previous study
and the recently established world's most advanced defect inspection capability of ~40 nm SiO2 equivalent sensitivity.
The EUV pod is a worthy solution to meet EUVL pilot line and pre-production exposure tool development requirements.
We will also discuss the technical challenges facing the industry in refining the EUV pod solution to meet 22 nm hp
EUVL production requirements and beyond.
Significant progress has been made over the past several years in developing extreme ultraviolet (EUV) mask
infrastructure, especially in EUV reticle handling and protection. Today, the industry has converged to standardize the
dual pod reticle carrier approach in developing EUV reticle handling solutions. SEMATECH has already established
reticle handling infrastructure compliant with industry's draft standard, including carrier, robotic carrier handling,
automated carrier cleaning, vacuum protection, and state-of-the-art particulate contamination testing capabilities. It
proves to be one of the key enablers in developing EUV reticle protection solutions, through broad collaboration with
industry stakeholders and suppliers. In this paper, we discuss our in-house reticle handling infrastructure and provide
insights on how to apply it in EUV lithography pilot line development and future production line. We present particulate
contamination free baseline results of state-of-the-art EUV reticle carriers, i.e., sPod, throughout lifecycle uses. We will
also compare the results against requirements for 32 nm half-pitch (HP) EUV lithography, to identify the remaining
challenges ahead of the industry.
Excellent progress has been made over the past years in meeting the demanding specifications for commercial extreme
ultraviolet (EUV) mask blanks. But as EUV technology is being prepared for pilot-line introduction later this decade, a
substantial effort is still required in many EUV mask infrastructure areas. These include defect inspection, reticlehandling
standardization, substrate and mask flatness, and resulting overall mask cost of ownership (CoO). Defect
inspection metrology for finding printable defects of < 30 nm polystyrene latex (PSL) size is a key EUV mask
infrastructure enabler. To meet EUV mask blank production specifications for 32 nm half-pitch (hp) manufacturing, a
next generation EUV mask blank inspection technology will be needed in 2-3 years. The industry must soon adopt
standards for EUV reticle handling including carrier and loadport solutions for unified requirements to support
commercial pilot-line and production tool developments. The stringent mask substrate flatness specification will be very
difficult to meet and is likely to significantly increase overall EUV mask cost. The industry needs to correct for nonflatness
at the various stages of a mask life cycle and must develop respective standards and specifications to determine
what kind of non-flatness can be corrected. For EUV lithography to be successful, it must be affordable. Lower EUV
mask costs have been a key advantage for EUV compared to optical mask extensions. To maintain this advantage, mask
manufacturing and metrology methods while supporting aggressive mask specifications must remain cost competitive.
In extreme ultraviolet lithography (EUVL), the lack of a suitable material to build conventional pellicles calls for
industry standardization of new techniques for protection and handling throughout the reticle's lifetime. This includes
reticle shipping, robotic handling, in-fab transport, storage, and uses in atmospheric environments for metrology and
vacuum environments for EUV exposure. In this paper, we review the status of the industry-wide progress in developing
EUVL reticle-handling solutions. We show the industry's leading reticle carrier approaches for particle-free protection,
such as improvements in conventional single carrier designs and new EUVL-specific carrier concepts, including
variations on a removable pellicle. Our test indicates dual pod approach of the removable pellicle led to nearly particle-free
use during a simulated life cycle, at ~50nm inspection sensitivity. We will provide an assessment of the remaining
technical challenges facing EUVL reticle-handling technology. Finally, we will review the progress of the SEMI EUVL
Reticle-handling Task Force in its efforts to standardize a final EUV reticle protection and handling solution.
The concept of Extreme Ultra-Violet Lithography (EUVL) mask dual pods is proposed for use in both mask shipping and handling in exposure tools. The inner pod was specially designed to protect masks from particle contamination during shipping from mask houses to wafer factories. It can be installed in a load-lock chamber of
exposure tools and evacuated while holding the mask inside. The inner pod upper cover is removed just before the
mask is installed to a mask stage. Prototypes were manufactured and tested for shipping and for vacuum cycling.
We counted particle adders through these actions with a detectable level of 54 nm and up. The adder count was
close to zero, or we can say that the obtained result is within the noise level of our present evaluation environment.
This indicates that the present concept is highly feasible for EUVL mask shipping and handling in exposure tools.
As semiconductor technology nodes continue shrinking down to 45nm and below, the requirements for number of particle adders and their size during optical mask blank shipment are getting tighter and tighter. In the case of extreme ultra-violet lithography (EUVL) for 32nm and below technology nodes, the requirements for shipping the final mask product are even more stringent. It virtually requires zero particle adders or single digit particle adders (if local mask clean tool is equipped at wafer fab) at 30nm size for 32nm technology node and even smaller size for the 22nm technology node. This EUVL mask handling specific issue is due to the lack of pellicle material available at EUV wavelength, because of strong EUV light absorption by all solid materials. In the past few years, several benchmarking studies on mask handling and shipping without pellicles have been conducted by different companies. The results indicated that many improvements are needed to bring down the handling and shipping induced particle adders at the required 30nm size for the 32nm technology node.
In this study, we have evaluated particle generation at ≥60nm PSL equivalent size during mask shipment. We have demonstrated zero particle adders in shipping by using mask carriers with simple design. Our study included different commercially available carriers and non-commercially available carrier with designs to further minimize the particle generation and deposition onto the mask critical surface. The study has also shown that both the carrier design and the shipping packaging are responsible for clean mask transportation. The smallest particle size (60nm) evaluated in this study is limited by the metrology capability. Further evaluation for particle adders at size ≤60nm requires new development for higher sensitivity inspection capability.
Chrome-based absorbers have been the mainstay of the photomask industry for three decades. While chrome is attractive because of its durability and opacity, it conversely poses challenges for etch and repair. Due to large capital investments, any new absorber must be designed to work with existing scanners, mask writers, and mask inspection tools. Furthermore changing absorber materials may not improve defect control in mask blank fabrication, which is a paramount concern in blank fabrication. Consequently, blank manufacturers are reluctant to change from chrome. In terms of return on investment (ROI), the only driver to switch technologies is achieving higher mask and wafer yields. This is a reasonable assumption as both etch and repair tool suppliers believe a non-chrome material like tantalum (Ta) compounds would significantly improve their capabilities with known technologies. A high level estimate shows that with even aggressive improvement assumptions, a 100% conversion from chrome does not save money. Based on the current International SEMATECH (ISMT) cost of ownership (COO) model and improved yields for critical dimension (CD) and defects, a case can be made for converting at and below 100 nm ground rules. An industry wide conversion from chrome to a non-chrome absorber is estimated to cost $100M. By contrast, blank suppliers are reportedly spending "multiple" millions of dollars to improve chrome per year. A widespread concern is whether binary optical masks have enough life left to provide sufficient ROI. Optical lithography will continue to be of use in the foreseeable future. Even as leading-edge production moves to new technology, the main manufacturing volumes will continue to create significant demand for masks for 100 nm to 45 nm for many years. With the industry currently pushing extreme ultraviolet lithography (EUVL), the best situation would be for EUVL and optical lithography to choose the same absorber material. This creates a winning situation for the industry independent of EUVL implementation timing. Today Ta-based films are a reasonable choice.
Alternating phase shift reticles are one proposed solution for printing features required at the 90 nm and 65 nm nodes using 193 nm lithography. A key enabler to the adoption of this technology is defect inspection so as to guarantee defect free reticles are delivered to wafer fab production. A test reticle with programmed sub-180 degree phase bump and divot defects has been developed that is representative of the sub-90 nm node. This reticle is characterized by SEM methods. This test reticle in turn is used to determine the defect detection performance of a DUV reticle inspection tool, which uses a phase contrast enhanced optical system to improve the detection of phase defects. This presentation discusses several of the challenges in the design and manufacture of the programmed defect test reticle, the reticle characterization results, and the inspection station results. Defect review methods are described which differentiate between chrome, phase bump, and phase divot defects. Additionally, a best known methodology (BKM) is discussed for the manufacture of alternating phase shift masks based upon detecting killer defects before significant additional value is added.
Alternating Phase Shift Masks (altPSM's) are an option for the production of critical layers at the 100 nm technology node and below. Successful implementation of altPSM's into a wafer manufacturing process depends upon the ability to successfully inspect, disposition and repair defects that occur during the mask manufacturing process. One technique previously described to improve phase defect contrast was the use of simultaneous transmitted and reflected light . The previous technique provided for improved phase defect detection in altPSM's produced for the 130 nm node at a 248 nm lithographic wavelength. This work describes the results from a die-to-die inspection method that improves phase defect contrast in transmitted light for altPSM's produced for the 100 nm node at a 193 nm wavelength. The improved phase defect detection technique addresses the challenges of decreasing linewidth/pitch and reduced defect phase resulting from the decrease in lithographic wavelength relative to the inspection wavelength of light. The improved phase defect detection method also provides a method to determine whether a defect is a binary, phase bump or phase divot type of defect. Results are compared against the previous inspection methods. A test vehicle for gathering sensitivity performance data is described along with the results obtained from the inspection system.
Alternating Phase Shift Masks (altPSM’s) are an option for the production of critical layers at the 100 nm technology node and below produced at ArF lithographic wavelength. Successful implementation of altPSM’s depends upon the ability to successfully inspect, disposition and repair defects that occur during the manufacturing process.
One technique previously described to improve phase defect contrast was the use of simultaneous transmitted and reflected light. The previously described technique provided for improved phase defect detection in altPSM’s produced for the 130 nm node at a 248 nm lithographic wavelength. This work describes the results from a die-to-die inspection method that improves phase defect contrast in transmitted light for altPSM’s produced for the 100 nm node at a 193 nm wavelength. The improved phase defect detection technique addresses the challenges of decreasing linewidth/pitch and reduced defect phase resulting from the decrease in lithographic wavelength relative to the inspection wavelength of light. The improved phase defect detection method also provides a method to determine whether a defect is a binary, phase bump or phase divot type of defect. Results are compared against the previous inspection methods. A test vehicle for gathering sensitivity performance data is described along with the results obtained from the inspection system.
In order to study the behavior of fluorine based CF4/O2 plasma in an inductively coupled plasma (ICP) reactor, 2-D axisymmetric simulations are carried out by using Plasmator. The modeling results have provided the spatial distributions of some important plasma and neutral species in the dry etch process. It is found that the prevailing species of the plasma is CF3+ ion. The negative ion density has been proved not significant in the current process. To find the effects of mass flow rate and ICP power, three examples have been calculated. Based on the assumption of that the etch rate is proportional to the ion flux, the comparison between the simulation results and experimental data has been conducted. The results of the trend agree reasonably well. The model paves a way to find the direction of design optimization for plasma etch process experiments.
Alternating Phase Shift Mask (APSM) reticles is critical to achieve sub 0.1 um poly gate lithography. Intrinsic APSM image inbalance can be resolved with various methods such as isotropic etch and aperture sizing, where positional line-shift can be reduced to within 5nm of final CD target. Defect reduction of APSM fabrication is addressed with multiple-option strategy to achieve high manufacturing yield. After Develop Inspection (ADI) capability was demonstrated with partial and complete missing 180 deg apertures, detected at post-develop with correlation to Qz defect after dry etch. Feasibility of APSM inspection and repair was demonstrated with existing toolsets and critical gap versus APSM defect specification remained to be bridged.