As the leading edge semiconductor technology development, the gate critical dimension (CD) shrinks below
90nm. The microlithography capability is limited by the exposure utility. The development of scanner is
focusing on low k that is implying that the high NA scanner is the main stream in the future. In addition, the
high NA reticle requirement is stricter than previous one. In aspect of mask manufacturing, reducing mask
topography effect is one of the various solutions, which is like lower mask blank flatness, should be lower than
1T flatness type or else. Unless the mask flatness, the absorber profile also could be a considerate effect element,
which is local topography effect contribution in wafer print window.
The main purpose of this study is verifying how much wafer prints window discrepancy between different
absorber profiles. The experiment pattern is designed for five kind of MoSi sidewall angle (SWA) on the same
mask, which could simultaneously gathers the wafer print window data. In addition, the other purpose is getting
exactly the same process condition of five kinds MoSi profile in both mask house and lithography of wafer
manufacturing Fab. The mask layout pattern is poly layer of logical 90 nm generation that is more critical among
all of lithography and was exposed by 193nm ArF.Then, we offer the effected level between absorber profile
and lithography process window. The process window of different SWA pattern will be compare to check the
relationship between process windows and mask profile. We also investigate how the profile affects the optical
With the use of 193nm lithography, haze growth has increasingly become a critical issue for
photomask suppliers and wafer fabs. Recent photomask industry surveys indicate the occurrence
rate of haze is 10 times higher on 193nm masks compared to 248nm masks. Additionally, work has
been presented that shows strong relationship between environmental conditions around the
photomask and the occurrence of haze at 193nm. This underscores the need to better understand
the basic mechanisms of haze and the measures such as environmental airborne molecular
contamination (AMC) control which can be employed to reduce the occurrence of haze in use.
A custom excimer laser test system capable of 193nm and 248nm wavelengths was built to
accelerate haze growth and to better understand haze formation mechanisms. Work on materials
impact on haze growth, such as pellicles and reticle compacts, as well as preliminary findings on
environmental impacts have been presented previously. Results indicate even on pristine
surfaces haze can grow when contaminants are present in the storage and use environment. The test
system has been upgraded to include tight control on the concentration of specific airborne
contaminants of concern. The impact of these contaminants and their relative concentrations will be
examined in this paper and are presented to aid the industry in determining the level of
environmental control needed over the life of a reticle.
Cleaning chemistry residue in photomask manufacturing is one of root causes to generate HAZE over surface of photomask for 193nm and shorter wavelength exposure tools. In order to reduce the residue, chemical free process is one of targets in photomask industry. In this paper novel clean technology without sulfuric acid and ammonia chemical are shown to manufacture sub-90nm node photomask. Photo and E-beam resist were removed by plasma and ozone water clean instead of sulfuric acid. SPM and APM in final clean sequence before defect inspection were substituted with ozone water and hydrogen water respectively. The clean performance was demonstrated in real production of 193nm phase shift mask. Sulfate and Ammonia residue after final clean were controlled same as blank material level without any clean process.
Photomask blank flatness is more important for wafer lithography so far. In view of economic and capital concern, venders of mask blank always provide several level flatness of blank what mask house request. And the wafer fabricators would request the flatter photomask to fit the next generation requirement. The topography effect of photomask should be a contribution of lithography process window. The effect includes quartz substrate flatness and distortion and the film of Cr and MoSi deposit. Besides, the Mask blanks have several shapes that are flat, concave and convex. Reducing the effect from mask is the main consideration of depth of focus improvement. In this study, we made two masks of different type, 0.5T and 2.5T. Flatness measurement is directly provided by interferometer. To verify the effect between mask blank flatness and wafer printing window. Furthermore, we also check patterned mask effect of flatness. The pattern we use is poly layer of logical 90 nm generation that is more critical among all of lithography process and was exposed by 193nm ArF environment. Primary purpose of the ADI (after develop inspection) performance concern is process window of wafer print. Then, we offer the effected level between mask blank flatness and lithography process window.
Chemically amplified resists, CAR, and 50kV e-beam writers have been applied for the most advance mask manufacturing. To fulfill the requirement of 65nm generation a good performance resist played an important role. In this work, two advanced positive and negative CAR resist has been evaluated for 65nm photomask process with a 50kV e-beam pattern generator in an advanced process line. For 65nm node not only the resolution is needed to be improved but also the cirtical dimension(CD) control will be more critical than previous generation. So the evaluation is focus on the CD performance, resolution, profile, e-beam sensitivity, line edge roughness(LER), etc.
To extend the application of ArF exposure tool, CPL is one of the most powerful technologies for the resolution enhancement. From previous study, the 2nd level writing by E-Beam writer has been developed to ensure the manufacturability of CPL process. To fulfill the application of CPL Mask, we implemented this technology for 65nm DRAM patterning. First we studied the performance and characteristics of CPL mask with optimized exposure illumination setting for the desired pattern and dimension of 65nm DRAM. Then the mask data for CPL mask manufacture has been generated by modeled pattern decomposition approach together with rule and modeled OPC. This was accomplished by using an engine named MaskWeaver. For the manufacture of CPL mask, we used a binary mask and the Qz was etched for the 180 degrees phase difference. We utilized a 2nd level writing by an E-Beam writer to make the zebra pattern that was generated by the engine for the optimized patterning performance. The exposure tool we utilized for the verification of wafer patterning is an advanced 193nm exposure system. The process performance indexes such as MEEF, process window, CD uniformity were collected to show the capability of CPL process. Also, simulation and empirical data were compared to verify the performance of CPL technology. So by using an optimized CPL technology included mask data generation skill, mask making specifications, and ArF illumination optimization, we can meet the manufacture requirement of 65nm DRAM.
To improve Critical Dimension (CD) uniformity is an important task in 65nm generation photomask and the beyond. It is known the develop process generates the CD variation. This study is focused on develop process. We initiated new type developer nozzle in this study to improve the CD uniformity. We devoted to improve the CD uniformity during develop process by optimizing the develop parameter through a Design of Experiment (DOE).
In the first step, we chose 11 parameters (Scan speed, Dispense flow rate, Develop time, Gap between photomask surface and slit nozzle edge) for L12 test to make sure which can control process. After the L12 test we selected 3 parameters (During develop dry/not, During develop rinse/not and scan times) for L4 test to optimized this experiment. Dependence on the L12 and L4 result, we get the best recipe. With the best recipe from L12 and L4, we verified CD uniformity in our production pattern. The CD target was 0.36um and CD uniformity was 6.8nm (range). We also studied about the relation of CD uniformity and process bias with the parameter.
The chromeless phase lithography (CPL) is a potential technology for low k1 optical image. For the CPL technology, we can control the local transmission rate to get optimized through pitch imaging performance. The CPL use zebra pattern to manipulate the pattern local transmission as a tri-tone structure in mask manufacturing. It needs the 2nd level writing to create the zebra pattern. The zebra pattern must be small enough not to be printed out and the 2nd writing overlay accuracy must keep within 40nm. The request is a challenge to E-beam 2nd writing function. The focus of this paper is in how to improve the overlay accuracy and get a precise pattern to form accurate pattern transmission. To fulfill this work several items have been done. To check the possibility of contamination in E-Beam chamber by the conductive layer coating we monitor the particle count in the E-Beam chamber before and after the coated blank load-unload. The conductivity of our conductive layer has been checked to eliminate the charging effect by optimizing film thickness. The dimension of alignment mark has also been optimized through experimentation. And finally we checked the PR remain to ensure sufficient process window in our etching process. To verify the performance of our process we check the 3D SEM picture. Also we use AIMs to prove the resolution improvement capability in CPL compared to the traditional methods-Binary mask and Half Tone mask. The achieved overlay accuracy and process can provide promising approach for NGL reticle manufacturing of CPL technology.