On Product Overlay (OPO) is a critical budget for advanced lithography. LithoInSight (LIS), an ASML application product, has proven to improve the ability of advanced process control (APC) for overlay with accurate fingerprint estimation and optimized scanner correction. It is now often used as Process of Record (PoR) for performing chuck/lot based run-to-run (R2R) control in a High Volume Manufacturing (HVM) environment. In order to further improve the on-product performance given the ever-tightening overlay spec. in advanced nodes, the question of how to reduce wafer-to-wafer process-induced variation has been asked frequently. Studies have shown that the wafer-to-wafer overlay variation is driven by certain critical process contexts. Aiming to bring a solution to the HVM phase, the ASML and Micron Data Science teams developed a Wafer Level Grouping Control (WLGC) methodology to perform overlay control given the process context information. This methodology has been implemented in one of the Micron production fabs, and demonstrated both reduced wafer-to-wafer (W2W) overlay variation and improved device yield on a yield-critical layer for a product from Micron 1z DRAM node.
Multi-patterning lithography for future technology nodes in logic and memory are driving the allowed on-product overlay error in an DUV and EUV matched machine operation down to values of 2 nm and below. The ASML ORION alignment sensor provides an effective way to deal with process impact on alignment marks. In addition, optimized higher order wafer alignment models combined with overlay metrology based feedforward correction schemes are deployed to control the process induced overlay variability from wafer-to-wafer and lot-to-lot. In addition machine learning based algorithms based on hybrid metrology inputs, strengthen the control capabilities for high volume manufacturing. The increase of the number of process layers in semiconductor devices results in an increase of control complexity of the total overlay and alignment control strategy. This complexity requires a holistic solution approach, that addresses total overlay optimization from process design, to process setup, and process control in high volume manufacturing. We find the optimum combination between feedforward and feedback, by having feedback deal with constant and predictable parts of overlay and have scanner wafer alignment covering the wafer-to-wafer variable part of overlay. In this paper we present investigation results using more wavelengths for wafer alignment and show the benefits in wavelength selection and recipe optimization. We investigate the wafer-to-wafer variable content of two experiment cases and show that a sample scheme of about 60 marks is well capable estimating the model parameters describing the grid. Finally, we show initial results of using level sensor metrology data as hybrid input to the derivation of the exposure grid.
Three methods to minimize the impact of alignment mark asymmetry on overlay variation are demonstrated. These methods are measurement based optimal color weighting (OCW), simulation based optimal color weighting, and wafer alignment model mapping (WAMM). Combination of WAMM and OCW methods delivers the highest reduction in overlay variation of 1.3nm (X direction) and 1.2nm (Y direction) as compared to best single color recipe. Simulation based OCW produces a similar reduction in overlay variation as compared to measurement based OCW, and simulation based OCW has the advantage that the scanner alignment recipe with optimize weights can be determined before the mark asymmetry excursion has occurred. Finally, WAMM is capable of reducing the contribution of mark asymmetry on overlay by using a more optimal high order wafer alignment recipe. Capabilities of WAMM can also be combined with OCW solutions.