Dr. Manuel Sanchez Raya Profile

Dr. Manuel Sanchez Raya

at Univ de Huelva

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Proceedings Article | 30 June 2005 Paper

Prototype board for the test of self-timed circuits developed in FPGAs

M. Sanchez Raya, R. Jimenez Naharro, J. Castro Ramirez

Proceedings Volume 5837, (2005) https://doi.org/10.1117/12.608336

KEYWORDS: Field programmable gate arrays, Prototyping, Digital electronics, Microcontrollers, Clocks, Interference (communication), Amplifiers, Switching, Switches, Sensors

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Nowadays, there exist a high number of commercial FPGA prototype boards. Nevertheless, these boards are basically oriented to functional verification of synchronous designs. So, it would be interesting to include tests modules dedicated to characterization of digital circuits. These circuits have not to be limited to synchronous circuits, but asynchronous circuits will also be considered due to their potential advantage. Among parameters to characterization, we are going to include the latency, throughput, power consumption and noise. One of the missions of this characterization will be the comparison among synchronous and asynchronous implementations. In most of existent boards, the measure of certain merit parameters of the design is hindered by the impossibility of varying the frequency of the clock signal, or for the inexistence of measuring points of power consumption or high-speed signals. The main novelty that contributes the design of this board is the possibility of extracting dynamic parameters of the design operation implemented on FPGA. In this work, a prototype board based on FPGA is proposed. One of the main novelty is the inclusion of an autonomous test system permitting functional verification and characterization of implemented designs. As an application, a test bench has been developed in order to compare and validate several arithmetic circuits, including synchronous and asynchronous implementations.

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