Mr. Marc E.J. Boonman Profile

Marc E.J. Boonman

at ASML Netherlands BV

SPIE Involvement:

Author

Publications (6)

Proceedings Article | 28 May 2004 Paper

The performance advantages of a dual-stage system

Marc Boonman, Coen Vin, Sjef Tempelaars, Ronald Doorn, John Zimmerman, Paul Teunissen, Arthur Minnaert

Proceedings Volume 5377, (2004) https://doi.org/10.1117/12.535799

KEYWORDS: Semiconducting wafers, Sensors, Servomechanisms, Metrology, Metals, Silicon, Digital signal processing, Scanners, Imaging systems, Environmental sensing

Read Abstract +

To realize improved process control at high productivity, the TWINSCAN platform has been developed. This dual stage lithography system combines high throughput TWINSCAN technology with excellent dynamical performance and imaging capabilities required by sub-80nm lithography. The added value of a dual stage system is increased utilization efficiency by performing wafer measurements and other overhead in parallel with exposures thus increasing the net wafers per hour. And additionally these wafer measurements can be done more extensively and create performance advantages of a dual stage system above a single stage system through its predictive and compensation inherent capability. In the measurement position, the wafer surface height is fully mapped using a high spatial frequency measuring level sensor allowing a complete 3-dimensional wafer map to be generated. This allows the wafer surface to be placed optimally in the focal plane of the lens, minimizing the defocus and therefore delivering optimal CD control. In this paper the leveling performance advantage of a dual stage system, proven by several test cases using wafers with known/designed wafer topography, is outlined. One of these cases will address the leveling performance advantage on high topography wafers, which is presented by means of defocus and CD uniformity results. The near ideal leveling performance will be shown by comparison between experimental defocus results and theoretically best achievable defocus given the intrinsic wafer flatness and finite slit size on both inner and edge fields. In contrast to on-the-fly leveling of single stage systems, the separate measurement position eliminates the critical timing relation between the wafer height measurement and actual exposure leveling performance, independent of the exposure scan speed. Besides leveling performance advantages, the dual stage systems full wafer map capability allows in-situ metrology which results in added value, like detailed focus spot monitoring functionality covering all areas to be exposed. Measuring the wafer height before exposure also offers flexibility in the method of deriving the desired stage positioning for exposure and the possibility to extract detailed information for real time wafer flatness monitoring.

Proceedings Article | 24 May 2004 Paper

Approaching new metrics for wafer flatness: an investigation of the lithographic consequences of wafer non-flatness

John Valley, Noel Poduje, Jaydeep Sinha, Neil Judell, Jie Wu, Marc Boonman, Sjef Tempelaars, Youri van Dommelen, Hans Kattouw, Jan Hauschild, William Hughes, Alexis Grabbe, Les Stanton

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.536092

KEYWORDS: Semiconducting wafers, Lithography, Critical dimension metrology, Metrology, Data acquisition, Reticles, Silicon, Inspection, Nomenclature, Optical alignment

Read Abstract +

Flatness of the incoming silicon wafer is one major contributor to the ultimate focusing limitation of modern exposure tools. Exposure tools are designed to chuck wafers without creating non-flatness and then use focus control to follow as closely as possible the chucked wafer front surface topography. The smaller size of the exposure slit in a step-and-scan exposure tool, as compared to the previous generation full-field stepper tool, helps minimize the impact of chucked wafer non-flat topography. However, to maintain high throughput and improve critical dimension uniformity (CDU) at sub-wavelength line-widths requires continuous improvement in the incoming silicon wafer flatness. In this paper we report extensive experimental results that review existing wafer flatness metrics and propose the addition of a new metric. The new metric emulates the scanning motion of exposure by integrating the defocus that each point on the wafer experiences during exposure. We show that this method is in better spatial agreement with measured defocus in step-and-scan exposure tools. Simple metrics of moving average (MA) defocus prediction analysis will be defined and shown to correlate very well to post exposure defocus data. These experiments were enabled by the creation of special 300-nm wafers by MEMC. These special wafers include sites with a wide variation in flatness. Prior to exposure the wafers were measured with a high-resolution optical flatness metrology tool (WaferSight by ADE) to obtain industry standard thickness variation (flatness) data. Incoming wafer flatness data is used to predict wafer suitability for lithography at the desired device geometry node (e.g., 90 nm). The flatness data was processed and characterized using both standard metrics (SFQR) and the new MA analysis. The relationship between the industry standard metric (SFQR) and similar metrics applied to MA analysis will be presented. Full two-dimensional maps are used to present spatial correlations and permit simple physical insights into the flatness data sets. Measurements of chucked wafer flatness were made on the same wafers using ASML TWINSCAN in-line metrology. These measurements correlate very well to thickness-based flatness. Un-chucked wafer flatness metrics (SFQR and MA) are shown to correlate well to post exposure defocus data when an appropriate site size is used. This result is discussed in relationship to the industry-accepted practice of specifying un-chucked wafer flatness. Lithography performance tests were made to prove the relevance of the different flatness metrics. The same special wafers are used for lithography performance tests. These tests achieve excellent correlation between post-exposure full-wafer focus control results and predictions based on both SFQ (industry standard) and MA re-mapping of the flatness data. The relationship between measured critical dimension (CD) and defocus is also explored. Point-by-point analysis of CD residual versus measured defocus data nicely follows a Bossung curve. We also show that residual CD values predicted from defocus correlate well with measured values. These experiments confirm the application of industry standard wafer flatness measurements to step-and-scan lithography when appropriately using current metrics. They also present the potential for improved metrics based on the MA defocus prediction analysis to help drive continuous improvement of wafer flatness for advanced step-and-scan lithography.

Proceedings Article | 26 June 2003 Paper

Study of the influence of substrate topography on the focusing performance of advanced lithography scanners

Bruno La Fontaine, Jan Hauschild, Mircea Dusa, Alden Acheta, Eric Apelgren, Marc Boonman, Jouke Krist, Ashok Khathuria, Harry Levinson, Anita Fumar-Pici, Marco Pieters

Proceedings Volume 5040, (2003) https://doi.org/10.1117/12.485535

KEYWORDS: Semiconducting wafers, Scanners, Etching, Silicon, Metrology, Lithography, Thin films, Computer simulations, Overlay metrology, Polishing

Read Abstract +

SPIE Journal Paper | 1 January 2003

Performance of a high productivity 300 mm dual stage 193 nm 0.75 NA TWINSCAN AT:1100B system for 100 nm applications

Rian Rubingh, Youri van Dommelen, Sjef Tempelaars, Marc Boonman, Roger Irwin, Edwin van Donkelaar, Hans Burgers, Guustaaf Savenije, Bert Koek, Michael Thier, Oliver Roempp, Christian Hembd-Soellner

JM3, Vol. 2, Issue 01, (January 2003) https://doi.org/10.1117/12.10.1117/1.1531190

KEYWORDS: Semiconducting wafers, Scanning electron microscopy, Critical dimension metrology, Reticles, Lithography, Monochromatic aberrations, Metrology, Imaging systems, Optical scanning systems, Distortion

Read Abstract +

Proceedings Article | 30 July 2002 Paper

Performance of a high-productivity 300-mm dual-stage 193-nm 0.75-NA TWINSCAN AT:1100B system for 100-nm applications

Rian Rubingh, Youri van Dommelen, Sjef Tempelaars, Marc Boonman, Roger Irwin, Edwin van Donkelaar, Hans Burgers, Guustaaf Savenaije, Bert Koek, Michael Thier, Oliver Roempp, Christian Hembd-Soellner

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474619

KEYWORDS: Semiconducting wafers, Monochromatic aberrations, Critical dimension metrology, Distortion, Lithography, Projection systems, Sensors, Scanning electron microscopy, Fiber optic illuminators, Reticles

Read Abstract +

Proceedings Article | 14 September 2001 Paper

Performance results of a new generation of 300-mm lithography systems

Boudewijn Sluijk, Tom Castenmiller, Richard du Croo de Jongh, Hans Jasper, Theo Modderman, Leon Levasier, Erik Loopstra, Guustaaf Savenije, Marc Boonman, Harry Cox

Proceedings Volume 4346, (2001) https://doi.org/10.1117/12.435752

KEYWORDS: Semiconducting wafers, Optical alignment, Lithography, Sensors, Imaging systems, Metrology, Reticles, Optical lithography, Overlay metrology, Optical scanning systems

Read Abstract +

Showing 5 of 6 publications

View contact details

UPDATE YOUR PROFILE

Is this your profile? Update it now.

Sign into your SPIE.org account

Don’t have a profile and want one?

Create an account on SPIE.org

Keywords/Phrases

Search In:

Publication Years