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Marco Tortonese
President at VLSI Standards Inc
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Publications (4)
Proceedings Article | 24 May 2004 Paper
Sub-50-nm isolated line and trench width artifacts for CD metrology
Marco Tortonese, Gian Lorusso, Rene Blanquies, Jerry Prochazka, Luca Grella
Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.536812
KEYWORDS: Silicon, Oxides, Semiconducting wafers, Transmission electron microscopy, Line edge roughness, Polishing, Critical dimension metrology, Etching, Calibration, Line width roughness
Proceedings Article | 2 June 2003 Paper
NIST-traceable calibration of CD-SEM magnification using a 100-nm pitch standard
Marco Tortonese, Yu Guan, Jerry Prochazka
Proceedings Volume 5038, (2003) https://doi.org/10.1117/12.482648
KEYWORDS: Calibration, Line edge roughness, Contamination, Statistical analysis, Standards development, Metrology, Electron beams, Distance measurement, Edge detection, Detection and tracking algorithms
Proceedings Article | 16 July 2002 Paper
100-nm-pitch standard characterization for metrology applications
Marco Tortonese, Jerry Prochazka, Paul Konicek, Jason Schneir, Ian Smith
Proceedings Volume 4689, (2002) https://doi.org/10.1117/12.473495
KEYWORDS: Calibration, Line edge roughness, Standards development, Semiconducting wafers, Metrology, Silicon, Scanning electron microscopy, Distance measurement, Lithography, Etching
Proceedings Article | 15 April 1997 Paper
Characterization of application-specific probes for SPMs
Marco Tortonese, Michael Kirk
Proceedings Volume 3009, (1997) https://doi.org/10.1117/12.271229
KEYWORDS: Silicon, Atomic force microscopy, Calibration, Oxides, Silicon films, Semiconducting wafers, Etching, Diamond, Scanning probe microscopy, Error analysis
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