EUV Defect avoidance techniques will play a vital role in extreme ultraviolet lithography (EUVL) photomask fabrication with the anticipation that defect free mask blanks won’t be available and that cost effective techniques will not be available for defect repairing. In addition, mask shops may not have a large inventory of expensive EUV mask blanks. Given these facts, defect avoidance can be used as cost effective technique to optimize the mask blank and design data (mask data) pair selection across mask blank manufacturers and mask shops so that overall mask blank utilization can be enhanced.<p> </p> In previous work, it was determined that the pattern shift based solution increases the chance that a defective mask blank can be used that would otherwise be discarded . In pattern shift, design data is shifted such that defects are either moved to isolated regions or hidden under the patterns that are written. However pattern shifts techniques don’t perform well with masks with higher defect counts. Pattern shift techniques in this form assume all defects to be equally critical. In addition, a defect is critical or important only if it lands on the main pattern. A defect landing on fill, sub-resolution assist feature (SRAF) or fiducial areas may not be critical. In this paper we assess the performance of pattern shift techniques assuming defects that are not critical based upon size or type, as well as defects landing in non-critical areas (smart shift) can be ignored.<p> </p> In a production mask manufacturing environment it is necessary to co-optimize and prioritize blank-design pairing for multiple mask layouts in the queue with the available blanks. A blank-design pairing tool maximizes the utilization of blanks by finding the best pairing between blanks and design data so that the maximum number of mask blanks can be used. In this paper we also propose a novel process which would optimize the usage of costly EUV mask blanks across mask blank manufacturers and mask shops which write masks.
At advanced technology nodes mask complexity has been increased because of large-scale use of resolution enhancement technologies (RET) which includes Optical Proximity Correction (OPC), Inverse Lithography Technology (ILT) and Source Mask Optimization (SMO). The number of defects detected during inspection of such mask increased drastically and differentiation of critical and non-critical defects are more challenging, complex and time consuming. Because of significant defectivity of EUVL masks and non-availability of actinic inspection, it is important and also challenging to predict the criticality of defects for printability on wafer. This is one of the significant barriers for the adoption of EUVL for semiconductor manufacturing. Techniques to decide criticality of defects from images captured using non actinic inspection images is desired till actinic inspection is not available. High resolution inspection of photomask images detects many defects which are used for process and mask qualification. Repairing all defects is not practical and probably not required, however it’s imperative to know which defects are severe enough to impact wafer before repair. Additionally, wafer printability check is always desired after repairing a defect. AIMS<sup>TM</sup> review is the industry standard for this, however doing AIMSTM review for all defects is expensive and very time consuming. Fast, accurate and an economical mechanism is desired which can predict defect printability on wafer accurately and quickly from images captured using high resolution inspection machine. Predicting defect printability from such images is challenging due to the fact that the high resolution images do not correlate with actual mask contours. The challenge is increased due to use of different optical condition during inspection other than actual scanner condition, and defects found in such images do not have correlation with actual impact on wafer. Our automated defect simulation tool predicts printability of defects at wafer level and automates the process of defect dispositioning from images captured using high resolution inspection machine. It first eliminates false defects due to registration, focus errors, image capture errors and random noise caused during inspection. For the remaining real defects, actual mask-like contours are generated using the Calibre® ILT solution , which is enhanced to predict the actual mask contours from high resolution defect images. It enables accurate prediction of defect contours, which is not possible from images captured using inspection machine because some information is already lost due to optical effects. Calibre’s simulation engine is used to generate images at wafer level using scanner optical conditions and mask-like contours as input. The tool then analyses simulated images and predicts defect printability. It automatically calculates maximum CD variation and decides which defects are severe to affect patterns on wafer. In this paper, we assess the printability of defects for the mask of advanced technology nodes. In particular, we will compare the recovered mask contours with contours extracted from SEM image of the mask and compare simulation results with AIMS<sup>TM</sup> for a variety of defects and patterns. The results of printability assessment and the accuracy of comparison are presented in this paper. We also suggest how this method can be extended to predict printability of defects identified on EUV photomasks.
The blank mask defect review process involves detailed analysis of defects observed across a substrate’s multiple preparation stages, such as cleaning and resist-coating. The detailed knowledge of these defects plays an important role in the eventual yield obtained by using the blank. Defect knowledge predominantly comprises of details such as the number of defects observed, and their accurate sizes. Mask usability assessment at the start of the preparation process, is crudely based on number of defects. Similarly, defect size gives an idea of eventual wafer defect printability. Furthermore, monitoring defect characteristics, specifically size and shape, aids in obtaining process related information such as cleaning or coating process efficiencies. <p> </p>Blank mask defect review process is largely manual in nature. However, the large number of defects, observed for latest technology nodes with reducing half-pitch sizes; and the associated amount of information, together make the process increasingly inefficient in terms of review time, accuracy and consistency. The usage of additional tools such as CDSEM may be required to further aid the review process resulting in increasing costs. <p> </p>Calibre® MDPAutoClassify™ provides an automated software alternative, in the form of a powerful analysis tool for fast, accurate, consistent and automatic classification of blank defects. Elaborate post-processing algorithms are applied on defect images generated by inspection machines, to extract and report significant defect information such as defect size, affecting defect printability and mask usability. The algorithm’s capabilities are challenged by the variety and complexity of defects encountered, in terms of defect nature, size, shape and composition; and the optical phenomena occurring around the defect .<p> </p> This paper mainly focuses on the results from the evaluation of Calibre® MDPAutoClassify™ product. The main objective of this evaluation is to assess the capability of accurately estimating the size of the defect from the inspection images automatically. The sensitivity to weak defect signals, filtering out noise to identify the defect signals and locating the defect in the images are key success factors. The performance of the tool is assessed on programmable defect masks and production masks from HVM production flow. Implementation of Calibre® MDPAutoClassify™ is projected to improve the accuracy of defect size as compared to what is reported by inspection machine, which is very critical for production, and the classification of defects will aid in arriving at appropriate dispositions like SEM review, repair and scrap.
A blank mask and its preparation stages, such as cleaning or resist coating, play an important role in the eventual yield obtained by using it. Blank mask defects’ impact analysis directly depends on the amount of available information such as the number of defects observed, their accurate locations and sizes. Mask usability qualification at the start of the preparation process, is crudely based on number of defects. Similarly, defect information such as size is sought to estimate eventual defect printability on the wafer. Tracking of defect characteristics, specifically size and shape, across multiple stages, can further be indicative of process related information such as cleaning or coating process efficiencies. At the first level, inspection machines address the requirement of defect characterization by detecting and reporting relevant defect information. The analysis of this information though is still largely a manual process. With advancing technology nodes and reducing half-pitch sizes, a large number of defects are observed; and the detailed knowledge associated, make manual defect review process an arduous task, in addition to adding sensitivity to human errors. Cases where defect information reported by inspection machine is not sufficient, mask shops rely on other tools. Use of CDSEM tools is one such option. However, these additional steps translate into increased costs. Calibre NxDAT based MDPAutoClassify tool provides an automated software alternative to the manual defect review process. Working on defect images generated by inspection machines, the tool extracts and reports additional information such as defect location, useful for defect avoidance<sup></sup>; defect size, useful in estimating defect printability; and, defect nature e.g. particle, scratch, resist void, etc., useful for process monitoring. The tool makes use of smart and elaborate post-processing algorithms to achieve this. Their elaborateness is a consequence of the variety and complexity of defects encountered. The variety arises due to factors such as defect nature, size, shape and composition; and the optical phenomena occurring around the defect. This paper focuses on preliminary characterization results, in terms of classification and size estimation, obtained by Calibre MDPAutoClassify tool on a variety of mask blank defects. It primarily highlights the challenges faced in achieving the results with reference to the variety of defects observed on blank mask substrates and the underlying complexities which make accurate defect size measurement an important and challenging task.
Mask preparation stages are crucial in mask manufacturing, since this mask is to later act as a template for
considerable number of dies on wafer. Defects on the initial blank substrate, and subsequent cleaned and coated
substrates, can have a profound impact on the usability of the finished mask. This emphasizes the need for early and
accurate identification of blank substrate defects and the risk they pose to the patterned reticle.
While Automatic Defect Classification (ADC) is a well-developed technology for inspection and analysis of
defects on patterned wafers and masks in the semiconductors industry, ADC for mask blanks is still in the early stages of
adoption and development. Calibre ADC is a powerful analysis tool for fast, accurate, consistent and automatic
classification of defects on mask blanks. Accurate, automated classification of mask blanks leads to better usability of
blanks by enabling defect avoidance technologies during mask writing. Detailed information on blank defects can help to
select appropriate job-decks to be written on the mask by defect avoidance tools .
Smart algorithms separate critical defects from the potentially large number of non-critical defects or false
defects detected at various stages during mask blank preparation. Mechanisms used by Calibre ADC to identify and
characterize defects include defect location and size, signal polarity (dark, bright) in both transmitted and reflected
review images, distinguishing defect signals from background noise in defect images. The Calibre ADC engine then uses
a decision tree to translate this information into a defect classification code. Using this automated process improves
classification accuracy, repeatability and speed, while avoiding the subjectivity of human judgment compared to the
alternative of manual defect classification by trained personnel .
This paper focuses on the results from the evaluation of Automatic Defect Classification (ADC) product at MP
Mask Technology Center (MPMask). The Calibre ADC tool was qualified on production mask blanks against the manual
classification. The classification accuracy of ADC is greater than 95% for critical defects with an overall accuracy of
90%. The sensitivity to weak defect signals and locating the defect in the images is a challenge we are resolving. The
performance of the tool has been demonstrated on multiple mask types and is ready for deployment in full volume mask
manufacturing production flow. Implementation of Calibre ADC is estimated to reduce the misclassification of critical
defects by 60-80%.
The mask inspection and defect classification is a crucial part of mask preparation technology and consumes a significant
amount of mask preparation time. As the patterns on a mask become smaller and more complex, the need for a highly
precise mask inspection system with high detection sensitivity becomes greater. However, due to the high sensitivity, in
addition to the detection of smaller defects on finer geometries, the inspection machine could report large number of
false defects. The total number of defects becomes significantly high and the manual classification of these defects,
where the operator should review each of the defects and classify them, may take huge amount of time. Apart from false
defects, many of the very small real defects may not print on the wafer and user needs to spend time on classifying them
as well. Also, sometimes, manual classification done by different operators may not be consistent. So, need for an
automatic, consistent and fast classification tool becomes more acute in more advanced nodes.
Automatic Defect Classification tool (NxADC) which is in advanced stage of development as part of NxDAT1, can
automatically classify defects accurately and consistently in very less amount of time, compared to a human operator.
Amongst the prospective defects as detected by the Mask Inspection System, NxADC identifies several types of false
defects such as false defects due to registration error, false defects due to problems with CCD, noise, etc. It is also able to
automatically classify real defects such as, pin-dot, pin-hole, clear extension, multiple-edges opaque, missing chrome,
We faced a large set of algorithmic challenges during the course of the development of our NxADC tool. These include
selecting the appropriate image alignment algorithm to detect registration errors (especially when there are sub-pixel
registration errors or misalignment in repetitive patterns such as line space), differentiating noise from very small real
defects, registering grey level defect images with layout data base, automatically finding out maximum critical
dimension (CD) variation for defective patterns (where patterns could have Manhattan as well as all angle edges), etc.
This paper discusses about many such key issues and suggests strategies to address some of them based upon our
experience while developing the NxADC and evaluating it on production mask defects.
The mask inspection and review process is a vital part of mask preparation technology and consumes a significant
amount of mask preparation time. As the patterns on a mask become smaller and more complex, the need for a
highly precise mask inspection system with a high detection sensitivity and low number of false defects becomes
greater. A low number of false defects is desirable as the results of the mask inspection are typically reviewed
manually by an operator in the mask shop. However, due to various reasons, the probable mask defects identified by
any mask inspection machine could include significant number of false defects. The false defects could be due to
registration or focus errors between the defect and reference images (Die-to-Die or D2D comparison), CCD
(Charge-coupled device) errors in the camera, noisy pixels etc. These false defects cannot be ignored and require the
operator to review them manually before classifying them as false defects. This takes valuable time and effort of the
mask inspector and increases the turn-around-time of mask inspection.
We propose a software tool which automatically detects most of the false defects generated due to registration and
CCD errors in the mask inspection system. It is quite common to find several thousands of defects (real as well as
false defects) during mask inspection. We have observed that significant percentage of these false defects are due to
registration and CCD errors in defect and reference images during D2D inspection. Automatic detection of
registration and CCD errors requires image processing to be done on the defect images. This process is typically,
time consuming. However, image processing algorithms are well suited for parallelization.
We explore the use of GPUs to speed up the false defect detection process by analyzing the defects in parallel on
multiple cores of a GPU. In addition, GPUs are inexpensive, readily available and can be plugged in to any desktop
computer which makes it easier to adopt. The proposed GPU based parallel false defect detection feature is
integrated into Mask Defect Analysis tool - NxDAT<sup>1</sup>.
Industry data suggests that Mask Inspection represents the second biggest component of Mask Cost and Mask Turn
Around Time (TAT). Ever decreasing defect size targets lead to more sensitive mask inspection across the chip, thus
generating too many defects. Hence, more operator time is being spent in analyzing and disposition of defects. Also, the
fact that multiple Mask Inspection Systems and Defect Analysis strategies would typically be in use in a Mask Shop or a
Wafer Foundry further complicates the situation. In this scenario, there is a need for a versatile, user friendly and
extensible Defect Analysis software that reduces operator analysis time and enables correct classification and disposition
of mask defects by providing intuitive visual and analysis aids.
We propose a new vendor-neutral defect analysis software, NxDAT, based on an open architecture. The open
architecture of NxDAT makes it easily extensible to support defect analysis for mask inspection systems from different
vendors. The capability to load results from mask inspection systems from different vendors either directly or through a
common interface enables the functionality of establishing correlation between inspections carried out by mask
inspection systems from different vendors. This capability of NxDAT enhances the effectiveness of defect analysis as it
directly addresses the real-life scenario where multiple types of mask inspection systems from different vendors co-exist
in mask shops or wafer foundries. The open architecture also potentially enables loading wafer inspection results as well
as loading data from other related tools such as Review Tools, Repair Tools, CD-SEM tools etc, and correlating them
with the corresponding mask inspection results.
A unique concept of Plug-In interface to NxDAT further enhances the openness of the architecture of NxDAT by
enabling end-users to add their own proprietary defect analysis and image processing algorithms. The plug-in interface
makes it possible for the end-users to make use of their collected knowledge through the years of experience in mask
inspection process by encapsulating the knowledge into software utilities and plugging them into NxDAT. The plug-in
interface is designed with the intent of enabling the pro-active mask defect analysis teams to build competitive
differentiation into their defect analysis process while protecting their knowledge internally within their company.
By providing interface with all major standard layout and mask data formats, NxDAT enables correlation of defect data
on reticles with design and mask databases, further extending the effectiveness of defect analysis for D2DB inspection.
NxDAT also includes many other advanced features for easy and fast navigation, visual display of defects, defect
selection, multi-tier classification, defect clustering and gridding, sophisticated CD and contact measurement analysis,
repeatability analysis such as adder analysis, defect trend, capture rate etc.
With the resolution enhancement techniques such as OPC (Optical Proximity Correction) and SRAF (Sub-Resolution
Assist Features), the size of layout data have grown significantly. It is quite common now to find layout files that are tens
of GBs in size. Unlike GDSII which can store data hierarchically, mask data formats such as MEBES are essentially flat
and more voluminous. Moreover, polygonal data present in layout data files is fractured, thereby increasing the data
volume before getting stored in MEBES data format. This results in huge MEBES files. As per the ITRS roadmap of
2005, for a 45nm half-pitch node that is expected to be in use by 2010, the mask data volume for a single layer is
expected to reach up to 825 GB. Storing and transferring such large mask data are issues for which the mask industry
Historically, MEBES is the most prevalent EB format in the industry. Moreover, in many Mask Data Preparation (MDP)
flows, the MEBES format is being used as the de-facto standard for specifying the fractured EB data even though the
final target EB machine might be different. In this paper we present techniques for lossless reversible compression of
MEBES data, i.e., when the compressed file is decompressed, the generated uncompressed file matches the original
MEBES file bit- by-bit. By applying these compression techniques a compression ratio of 5X to 15X can be obtained.
In practice, compressing MEBES files is usually a one-time task, but decompression of compressed files is expected to
be done multiple times as every time a compressed MEBES file needs processing, it has to be decompressed. MEBES is
essentially an efficient data format and the geometries are stored compactly. As a result the compression/decompression
techniques described in this paper are quite computation intensive in order to achieve higher compression ratio. This in
turn leads to higher CPU time for compression/decompression compared to generic compressors such as gzip. However,
as the format-specific compressors produce higher compression ratios, the disk I/O time for compression and
decompression is expected to be less compared to the generic compressors such as gzip and gunzip. In spite of this, the
format-specific decompressor is usually 3-5X times slower than the generic decompressor such as gunzip. Since
decompression is expected to be done more frequently as compared to compression, speeding up decompression is
highly desirable. We present a compression technique for MEBES data which enables multiple process threads to
decompress the compressed MEBES data. With the multi-core multiprocessor machines becoming quite inexpensive and
common, the multi-threaded decompression is expected to perform close to the disk I/O time on such machines.
The paper details out the techniques, experimental results in terms of comparative compression ratios, compression and
decompression speed using single threads and multiple threads. The possibility of getting higher compression ratios as
well as higher or comparable decompression speed makes it more practical to use format specific reversible compression
schemes rather than using generic compressors. Even though, the paper focuses on compression and decompression of
MEBES, it can be easily extended to the compression of GDSII .
In the UDSM regime of 65 nm and below, a majority of mask layers require Resolution Enhancement Techniques
(RET) to enhance their printability on the wafer. The RET has a huge amount of impact on the layout data both in
terms of size and the polygonal data characteristics. The Optical Proximity Correction (OPC) step would reduce
the original layout hierarchy by a large extent. Moreover, OPC would either add a large number of geometries to
the layout data or would split the original edges in the layout geometries into segments. As a result, the size of the
layout data file would increase manifold which could be several hundreds of gigabytes for a single mask layer.
The growth in layout data size along with more complex polygons introduced during OPC necessitates that the
fracturing tool produce higher quality fracturing with less turn-around-time (TAT) during Mask Data Preparation
(MDP) as well as actual mask-write by the EB machine. The VSB (Variable Shaped Beam) machine differs from
traditional raster based e-beam machines in many ways. The VSB machine writing time as well as the quality of
the masks written by it is significantly affected by the quality of fracturing compared to a raster based mask writer.
The two requirements, namely, of reducing the TAT for MDP and increasing the quality of the mask written by
mask writer usually counteract with each other. In this paper, we propose a scheme that addresses both the issues.
With rapid increase in the number of geometries in a chip and aggressive RET carried out on layout data, it has
become very much imperative to address the issue of layout and EB data explosion during IC design. Currently,
the most widely used GDSII format for layout data as well as the widely used data formats for EB data, are
incapable of handling the huge amount of data prevalent in the UDSM regime. The new non-proprietary
standardized formats of OASIS for layout data and OASIS.VSB for EB data are the way the industry is likely to
go in the near future to address the issue of data explosion. But, the process of adoption of these new formats is
too slow as it takes a long time for new design flows to mature. The speed of adoption is especially slow in the
post-layout domain as it is very close to manufacturing and the cost of error is too high. However, the issue of
layout and EB data explosion is real and immediate and hence, it should be addressed in short term without
waiting for the long term solution to arrive.
This paper discusses about an alternative approach of employing format-specific lossless reversible layout and
EB data compression schemes to compress the layout and EB data. The performance and the advantage of this
approach are compared with the currently prevalent approach of using OASIS primarily and solely for on-disk
file size reduction. It is argued that the reversible compression techniques could be a better approach for on-disk
data file size reduction as they would not only reduce the file sizes but could also almost seamlessly get integrated
into the current tool flow without necessitating major changes in the tool flow. The possibility of using OASIS
itself as a format for lossless reversible compression of GDSII and MEBES data is also discussed. It is also
argued that for successful adoption of OASIS formats by the industry mere on-disk file size reduction may not be
sufficient. Higher value additions such as reduction in in-core database size, enabling higher performance in data
processing etc. may have to be addressed by the tool flows which adopt OASIS based formats natively.
With the increase in layout data (GDSII) size due to finer geometries and resolution enhancement techniques such as Optical Proximity Correction (OPC) and Phase Shift Mask (PSM), layout data is proving to be too voluminous to process by single CPU machines. Post-layout tools have now moved towards distributed computing techniques to process this data more efficiently in terms of speed. Typical distributed computing architectures involve distributing the layout data to various workstations and then each workstation processing its part of the data in parallel. This approach will work well provided the amount of data that is to be distributed is not too large. As the size of the layout data is increasing significantly, the time taken to transfer the layout data between the workstations is turning out to be a major bottleneck. This bottleneck gets further highlighted because the time taken for actual operations gets almost linearly scaled down through employing higher number of workstations in the distributed computing environment and also because the clock speed of the workstations get continuously improved.
The focus of this paper is on a smart way of distributing the layout data so that the amount of redundant data transfer is significantly reduced. This is achieved by selective data distribution wherein the layout data is fragmented and each workstation is provided with minimal and sufficient layout information for it to determine the actual fragments required for its processing.
With the ever increasing layout data size due to finer geometries and resolution enhancement techniques such as OPC and PSM, handling several tens of gigabytes of GDSII data is becoming very difficult. While new efficient OASIS format is being proposed to replace it, GDSII is here to stay for next several years. This paper discusses two approaches by which the GDSII data can be handled effectively. <i>Reversible</i> compression will be able to produce original GDSII file bit-by-bit and can produce compression of around 20 times. <i>Irreversible </i>compression can produce functionally equivalent GDSII after decompression.