TNO has built EBL2, an EUV exposure facility equipped with an in vacuo X-ray photoelectron spectroscopy setup (XPS) and an in-situ ellipsometer. EBL2 enables lifetime testing of EUV optics, photomasks, pellicles and related components under development in relevant EUV scanner and source conditions, which was previously not available to industry. This lifetime testing can help the industry to prepare for high volume production using EUV lithography by bringing forward information about material behavior which facilitates the development cycle. This paper describes an EUV photomask lifetime test performed at EBL2. The mask was exposed to different EUV doses under a controlled gas and temperature environment. To investigate how EUV light interacts with the mask, various analysis techniques were applied before and after EUV exposure. In-situ XPS was used to investigate elemental compositions of the mask surface. An ex-situ critical dimension scanning electron microscope (CD-SEM) and an atomic force microscope (AFM) were used to explore the impact of EUV light on critical dimensions (CD) and feature profiles. In addition, EUV reflectometry (EUVR) was used to investigate the change of reflectivity after EUV exposures. The exposure conditions are reported, as well as an analysis of the effects observed.
EUV lithography is entering High Volume Manufacturing at relative high Rayleigh factor k1 above 0.4. In comparison immersion lithography has been pushed to k1 values of 0.3 or below over the last two decades. One of the strong contributors determining the effective usable resolution is the mask absorber stack. The mask stack alters the diffraction by modifying the phase and intensity of the diffracted orders. In this paper we show the exposure results of a test mask having higher absorbance of EUV light and the advantages of reduced Mask 3D effects to imaging.
The lack of defect-free EUV photomask blanks is one of the multiple challenges in the application of EUV lithography for high volume wafer manufacturing. In EUV photomask manufacturing, shifting the design before writing to avoid patterning over blank defects (pattern shift process) is one of the methods for defect mitigation. A reliable pattern shift process depends upon precise image placement during EUV mask writing. Specifically, accurate determinations of centrality, mean shift distances and residual image placement (IP) errors (3σ) are required and reports describing pattern shift processes1-8 echo this importance of accurate IP during EUV photomask writing. The pattern shift process detailed in this report improves IP accuracy for EUV photomasks aligned on fiducial marks (FM) and increases the budget of potential pattern shifts, while remaining within the mask centrality specification limits. Our process is demonstrated on EUV products where <5 nm 3σ of uncorrected IP error for aligned patterns was achieved.
Monitoring of pattern roughness for advanced technology nodes is crucial as this roughness can adversely affect device yield and degrade device performance. The main industry work horse for in-line roughness measurements is the CD-SEM, however, today no adequate reference metrology tools exist that allow to evaluate its roughness measurement sensitivity and precision. To bridge this gap, in this work the roughness measurement capabilities of different analytical techniques are investigated. Different metrology methods are used to evaluate roughness on a same set of samples and results are compared and used in a holistic approach to better characterize and quantify the measured pattern roughness. To facilitate the correlation between the various metrology techniques and the evaluation of CD-SEM sensitivity, an effective approach is to induce pattern roughness in a controlled way by adding well defined levels of roughness to the designed patterns on a EUV mask and to measure the response and sensitivity of CD-SEM and of the other techniques to these different pattern roughness levels once printed on wafers. This paper presents the roughness measurement results obtained with various metrology technologies including CD-SEM, OCD, S-TEM and XCD on EUV Lithography patterned wafers both postlithography and post-etch. The benefits of recently developed metrology enhancements are demonstrated as well; automated TEM allows to generate accurate and rather precise reference roughness data, Machine Learning enables OCD based roughness metrology with good correlation to CD-SEM and STEM, and the improved sensitivity of EUV and X-ray scattering systems allows to extract roughness information that does correlate to CD-SEM.
EUV technology is according to current trend approaching the final development phase in which defect free EUV masks
are of key importance for development and optimization of the lithography process. This task consists of three
contributing aspects- defect free multilayer blank, mask manufacturing process with very low defect formation
probability and availability of repair process for EUV mask.
In comparison to optical mask, development of the repair process for EUV mask is different in several aspects. The fact,
that the TaN absorber is placed on top of Mo/Si mirror is making the process very sensitive to variation of the mask
material, as the etch rate of the mirror is significantly higher, than that of absorber, when no capping layer is present
between the absorber and ML mirror. The presence of the Ru capping layer increases the process window due to
significant selectivity improvement by one or two orders of magnitude, however, the capping layer is very sensitive to
damage by preceding manufacturing processes.
Its thickness and also it chemical purity - lack of modification by incorporation of impurities is crucial for successful
The repair process for optical masks is typically optimized using AIMS for both development and qualification of the
process. The availability of EUV AIMS system is very limited, for what reason we have to rely on other measures
during the process development and use the AIMS for process qualification only, or use correlation between e.g. CD
SEM or AFM measurement and AIMS data for selection and qualification of the repair process.
Also the usage of mask – exposure on the scanner is modifying the mask surface. Therefore the impact of the mask
exposure needs to be investigated, when EUV gets in HVM stage.
In the past, the influence of the mask cleaning process on the integrity of EUV mask was investigated, with respect to
several lithography-critical parameters as actinic reflectivity, critical dimension (CD) shift, edge roughness and surface
roughness. The reparability of the mask was so far not in focus, assuming, that mask can be repaired anytime during its
lifetime. This missing item needed for the successful usage of EUV mask needs to be checked and status confirmed
prior start of the HVM.
EUV developed in the last decade to the most promising <7nm technology candidate. Defects are considered to be one of the most critical issues of the EUV mask. There are several contributors which make the EUV mask so different from the optical one. First one is the significantly more complicated mask stack consisting currently of 40 Mo/Si double layers, covered by Ru capping layer and TaN/TaO absorber/anti-reflective coating on top of the front face of the mask. Backside is in contrary to optical mask covered as well by conductive layer consisting of Cr or CrN. Second contributor is the fact that EUV mask is currently in contrary to optical mask not yet equipped with sealed pellicle, leading to much higher risk of mask contamination. Third reason is use of EUV mask in vacuum, possibly leading to deposition of vacuum contaminants on the EUV mask surface. Latter reason in combination with tight requirements on backside cleanliness lead to the request of frequent recleaning of the EUV mask, in order to sustain mask lifetime similar to that of optical mask. Mask cleaning process alters slightly the surface of any mask - binary COG mask, as well as phase shift mask of any type and naturally also of the EUV mask as well. In case of optical masks the changes are almost negligible, as the mask is exposed to max. 10-20 re-cleans within its life time. These modifications can be expressed in terms of different specified parameters, e.g. CD shift, phase/trans shift, change of the surface roughness etc. The CD shift, expressed as thinning (or exceptionally thickening) of the dark features on the mask is typically in order of magnitude 0.1nm per process run, which is completely acceptable for optical mask. Projected on the lifetime of EUV mask, assuming 100 clean process cycles, this will lead to CD change of about 10nm. For this reason the requirements for EUV mask cleaning are significantly tighter, << 0.1 nm per process run. This task will look even more challenging, when considering, that the tools for CD measurement at the EUV mask are identical as for optical mask. There is one aspect influencing the CD shift, which demands attention. The mask composition of the EUV mask is significantly different from the optical mask. More precisely there are 2 materials influencing the estimated CD in case of EUV mask, whereas there is one material only in case of optical masks, in first approximation. For optical masks, the CD changes can be attributed to modification of the absorber/ARC layer, as the quartz substrate can be hardly modified by the wet process. For EUV Masks chemical modification of the Ru capping layer - thinning, oxidization etc. are rather more probable and we need to take into account, how this effects can influence the CD measurement process. CD changes measured can be interpreted as either change in the feature size, or modification of the chemical nature of both absorber/ARC layer stack and the Ru capping layer. In our work we try to separate the effect of absorber and Ru/capping layer on the CD shift observed and propose independent way of estimation both parameters.
The EUV mask readiness is ranked under the top three challenges for successful introduction of EUV into high volume manufacturing. Whereas the basic mask manufacturing processes can be principally taken over from optical mask manufacturing, the big amount of new materials incorporated in the relatively complicated EUV mask stack is causing new effects either by their chemical and physical nature, or by their interaction with the processes. Some of the major challenges for EUV mask manufacturing compared to the optical mask is the EUV mask lifetime. First of those is the high illumination energy, which is expected to introduce changes in the mask stack, degradation of the pattern fidelity and reflectivity of the EUV mask. Also EUV mask manufacturing processes influence the mask lifetime. Few of those processes used over decade for successful manufacturing of optical mask can be used for manufacturing of EUV mask, which however will not perform very well and will impact mask lifetime. Interactions between unit processes were identified, influencing not only the pristine mask performance, but impacting their lifetime as well. In our work mainly the interaction between EUV etch and dedicated EUV cleaning process is investigated. Mainly the absorber etch process is dominantly determining the actinic reflectivity and its uniformity across the mask. Additionally the etch process is interacting with the clean process and limits the threshold for mask properties change due to clean process. Finally modification of surface layer and the presence (or absence) of Ru-based capping layer are critical factors for overall EUV mask properties and stability.
Pending the availability of actinic inspection tools, optical inspection tools with 193 nm DUV
illumination wavelength are currently used to inspect EUV masks and EUVL-exposed wafers.
Due to strong optical absorption, DUV photons can penetrate only a few surface layers of EUV
masks, making them sub-optimal for detecting hidden defects embedded within the sub-layers of
the mask, the so-called phase defects. Although these phase defects may not be detected by
optical inspection tools, they may print on the wafer. Conversely, false and nuisance defects
which may not print on the wafer may be detected by optical inspection tools, and by so doing,
degrade the inspection sensitivity of the tool to real and critical defects. This paper discusses
approaches to optimizing the optical inspection sensitivity of EUV masks, with a view to
overcoming some of the absorption limitations of the inspection wavelength and also with a view
to enhancing the imaging contrast of the reflected light between the low reflective absorber/antireflection
coating stack and the moderately reflective mirror surface of Mo/Si bilayers, capped
with a thin Ru layer, and which serves to protect the mirror surface from damage and
contamination during mask fabrication and wafer printing processes. The effects of mask
absorber/ARC stack thickness on optical inspection contrast are simulated using rigorous
coupled wave analysis (RCWA), and compared to experimental results. EUV masks with thin
absorber/ARC stacks are observed to have higher inspection contrast, up to 15 % higher than
their thicker counterparts, especially as the feature pitch gets smaller. Blank defect inspection
performance of tools such as the Siemens DFX40 tool and KLA 617 Teron tool equipped with
Phasur module are compared, and correlated with patterned mask inspection data generated from
KLA 617 Teron tool. Patterned mask defect sensitivities to the tune of 40 nm and 90 nm were
obtained on thin and thick absorber/ARC stacks, respectively. The defect location accuracy of
the Teron 617 tool is better than 250 nm (3σ), while the alignment repeatability of the Teron 617
on the fiducials is better than 60 nm (3σ). Printability of mask blank and patterned mask defects
on exposed wafers in terms of what and where the defects print, are also presented. Four masks
with different absorber and antireflection coating thicknesses, some with substrate and absorber programmed defects of different types and sizes, were fabricated and used to expose resistcoated
SiN substrate wafers on full field ASML EUV scanners.
The chemically-amplified resists have been exposed by hyper-NA 193nm immersion and EUV lithography. Patterns
with 45nm half-pitch and below are investigated for process windows and line-edge roughness. Although the 193nm
immersion and EUV lithography have totally different optics, an overlap of the resolution capability is clearly observed
around 45nm half-pitches. Both lithographic processes show comparable process windows for 45nm dense lines. The
193i resist better responds to its aerial image than that of the EUV resist. Although the EUV tool has the resolution
capability down to 20nm half-pitch, immature resist process limits the current resolution to 35nm half-pitch.
Several masks have been fabricated and exposed with the small-field Micro Exposure Tool (MET) at the Advanced Light Source (ALS) synchrotron in Berkeley using EUV radiation at 13.5 nm wavelength. Investigated mask types include two different absorber masks with TaN absorber as well as an etched multilayer mask. The resulting printing performance under different illumination conditions were studied by process window analysis on wafer level. Features with resolution of 60 nm and below were resolved with all masks. The TaN absorber masks with different stack thicknesses showed a similar size of process window. The differences in process windows for line patterns were analyzed for 60 nm patterns. The implications on the choice of optimum mask architecture are discussed.
Three different architectures were compared as candidates for EUV lithography masks. Binary masks were fabricated using two different stacks of absorber materials and using a selective etching process to directly pattern the multilayer of the mask blank. To compare the effects of mask architecture on resist patterning, all three masks were used to print features into photoresist on the EUV micro-exposure tool (MET) at Lawrence Berkeley National Laboratory. Process windows, depth of focus, mask contrast at EUV, and horizontal and vertical line width bias were use as metrics to compare mask architecture. From printing experiments, a mask architecture using a tantalum nitride absorber stack exhibited the greatest depth of focus and process window of the three masks. Experimental results obtained using prototype masks are discussed in relation to simulations. After accounting for CD biasing on the masks, similar performance was found for all three mask architectures.