Process Window Qualification (PWQ) is a well-established wafer inspection technique used to qualify the design of
mask sets and to characterize lithography process windows. While PWQ typically employs a broadband brightfield
inspector, novel techniques for patterned wafer darkfield inspection have proven to provide sufficient sensitivity along
with noise suppression benefits for lithography layers. This paper describes the introduction and implementation of
PWQ on patterned wafer darkfield inspectors. An initial project characterized critical PWQ requirements on the
darkfield inspector. The results showed that this new approach meets performance requirements, such as defect of
interest (DOI) detection and process window characterization, as well as ease-of-use requirements such as automated
setup for advanced design rule products.
With the introduction of sub-100nm design rules, and especially 193nm photolithography, the development of new
monitoring strategies is becoming increasingly important and necessary as new materials, new tools and new process
challenges are introduced. Micro after-develop inspection (μADI) is a big step forward for photolithography defect
monitoring as well as for integrated process learning.
Resist quality and handling are essential for the whole process. The new 193nm resists exhibit an inherent defectivity,
which is solely attributable to the quality of the resist. This defectivity comes from very small resist inhomogeneity, and
leads to tiny bridging and stringer defects which can affect yield critically. Additionally, the entire lithography process
(handling and scanning) is more critical, as process windows are decreasing to levels of common positioning accuracy
and layer thicknesses.
On the one hand, increased inspection sensitivity is needed to control the resist quality more tightly. With
straightforward improvements to inspection technology, these sensitivity requirements can be met on <i>test wafers</i>, mainly
because of the wafers' simplified structures and the absence of noise sources. However, on the other hand, there is a
demand for a monitoring strategy which uses product wafers to enable the understanding of the interaction of material,
structure, topography and shrinking process window. Test wafer monitoring is able to provide only an isolated snap shot
of a specific work-step without further interaction. An integrated monitoring strategy of product wafers requires more
advanced and innovative inspection technologies - providing both enhanced sensitivity and superior noise suppression -
as lithography layers can show a lot of non-yield relevant etch mask defects that are very hard to suppress with common
This work introduces a novel after-lithography monitoring strategy based on a darkfield defect inspection technique on
product wafers. Wafers can be scanned after development with superior noise suppression at resolutions approximating
traditional brightfield inspection capabilities enabling lithography defect detection down to single line short levels. Thus,
completely new inspection approaches for tool and line monitoring can be developed, sample plans can be optimized,
and time to results and appropriate corrective actions can be significantly shortened.
New photoresist chemistries, new process equipment, smaller design pitches and shrinking process windows all pose new challenges to resist and lithography process quality control. Controlling 193-nm resist defectivity is particluarly challenging, since the size of potential yield-critical defects shrinks in relative proportion to the size of the pitch. Standard defect density control strategies -- which involve taking liquid particle measurements of the resist at the vendor site, as well as inspecting unpatterned wafers coated with the resist -- are insufficient in identifying critical defect issues with 193-nm resists. Thus, they can no longer meet the advanced quality requirements of IC manufacturers. In this paper, we discuss a successful defect reduction project implemented at Infineon Technologies Dresden involving several resist vendors and the use of high-resolution inspection on patterned wafers. The importance of defect control on patterned wafers in addition to standard quality checks was clearly demonstrated. Based on the results presented in this paper, we believe that resist vendors should establish a defect control methodology that uses patterned wafers as a criterion for resist development and to ensure quality control.