For directed self-assembly (DSA) to be deployed in advanced semiconductor technologies, it must reliably integrate into a full process flow. We present a methodology for using virtual fabrication software, including predictive DSA process models, to develop and analyze the replacement of self-aligned quadruple patterning with Liu–Nealey chemoepitaxy on a 14-nm dynamic random access memory (DRAM) process. To quantify the impact of this module replacement, we investigated a key process yield metric for DRAM, interface area between the capacitor contacts and transistor source/drain. Additionally, we demonstrate virtual fabrication of the DRAM cell’s hexagonally packed capacitors patterned with an array of diblock copolymer cylinders in place of fourfold litho-etch (LE4) patterning.
For Directed Self-Assembly (DSA) to be deployed in advanced semiconductor technologies, it must reliably integrate into a full process flow. We present a methodology for using virtual fabrication software, including predictive DSA process models, to develop and analyze the replacement of SAQP patterning with LiNe chemoepitaxy on a 14nm DRAM process. To quantify the impact of this module replacement, we investigate a key process yield metric for DRAM: interface area between the capacitor contacts and transistor source/drain. Additionally, we demonstrate virtual fabrication of the DRAM cell’s hexagonally-packed capacitors patterned with an array of diblock copolymer cylinders in place of LE4 patterning.
A new hybrid 3D finite-element/behavioral-modeling approach is presented that can be used to accurately predict the
nonlinear dynamics (parametric resonance) in electrostatically driven 2D resonant MEMS scanning mirrors. We
demonstrate new levels of accuracy and speed for thick SOI scanning mirrors with large scanning angles and validate the
modeling approach against measurement on a previously fabricated scanning mirror. The modeling approach is fast and
treats the design parameters as variables thus enabling rapid design iterations, automatic sensitivity and statistical yield
analyses, and integration with system and circuit simulators for coupled MEMS-IC cosimulation.
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