Nanoengineering approach was used to develop an efficient active medium based on self-assembled InAs/GaAs quantum dots (QDs) for laser diodes operating at elevated temperatures. Photoluminescence (PL), transmission electron microscopy, and electroluminescence were used to study the influence of an overgrowth procedure on the properties of multiple-layer QDs. Optical properties of QDs were optimized by the adjustment of a GaAs overlayer thickness prior to a heating step, responsible for the truncation of the pyramid-shaped QDs. Triple-layer QD edge-emitting lasers with 1220 nm emitting wavelength exhibited a maximum saturated modal gain of 16 cm-1. To use truncated QD active medium for vertical cavity surface emitting lasers, seven layers of QDs with 20 nm of short period superlattice barriers between layers was developed. A wavelength of 1190 nm edge-emitting lasers with 120 nm total thickness 7xQDs active medium showed almost two times higher maximum saturated gain, 31 cm-1. Unfortunately, these lasers with closer distance between QD layers in active medium demonstrated stronger temperature dependence (with To = 110 K) of threshold current density and lasing wavelength. A record high characteristic temperature for lasing threshold, To = 380 K up to 55 C, was measured for edge-emitting laser diodes, which contained triple-layer truncated QD active medium. We believe that AlAs capping in combination with truncation procedure result in significant suppression of carrier transport between QDs within the layer as well as between QD layers.
We have studied the influence of overgrowth procedure and a few monolayer-thick AlAs capping layers on the properties of self-assembled InAs quantum dots (QDs) using transmission electron microscopy (TEM), scanning electron microscopy, and photoluminescence (PL). PL spectroscopy was used to study and optimize optical properties of the QDs by shape engineering (QD truncation) through adjustment of the thickness of overlayers and temperature of the subsequent heating. QDs with 6 nm-thick overlayer with heating step at 560°C was found to have the highest PL intensity at room temperature and the lowest FWHM, 29 meV. Ground state energy of the truncated QDs is very stable against variations of growth parameters. TEM measurements show that the capping AlAs layer covers the QDs entirely even though the dots are truncated by the heating step. 1.22 μm edge-emitting laser with triple-layer truncated QD gain medium demonstrated room temperature minimum threshold current density, 56 A/cm2, and high saturated modal gain, 16 cm-1. Extremely high characteristic temperature, To = 304 K in the 20 - 60°C interval, and maximum lasing temperature of 219°C were measured for this laser diode.
Inadequate performance of interconnects in emerging integrated circuitry has generated a need for alternative signal transmission solutions. Integration of dense arrays of high frequency III-V photoemitters and photodetectors with Si platform is one of the challenging tasks. Comparison of monolithic and hybrid integration technologies highlights the advantages of hybrid approaches at least for emitters highly sensitive to growth defects. A novel protocol for fabrication of III-V optoelectronic components such as LEDs, VCSELs and photodetectors on Si platform is proposed. The simulations of thermal behavior and mechanical stresses of this integration scheme was performed using finite element analysis and revealed adequate heat dissipation. Simulations show that this protocol allows to reduce overheating and mechanical stresses to enhance the optoelectronic devices performance and increase their lifetime. The III-V structures are grown homoepitaxialy on GaAs substrate, then bonded to a Si wafer using low-temperature polymer followed by wet etching of the substrate. The scheme involves VCSEL processing with coplanar metallization on Si with PMGI reflow planarization. MBE-grown reversed VCSEL structure was used for manufacturing of the test devices using this novel protocol. An AlAs etch stop layer was imbedded into the structure. 10 um thick VCSEL structure was bonded on Si using BCB (CycloteneTM). Substrate was completely removed by selective etching to reduce thermal stresses to enhance the optoelectronic devices performance and increase their lifetime. The array of the 3D devices was fabricated using wet etching. A 10 um-thick high frequency VCSEL with coplanar metallization is processed on Si with PMGI reflow planarization. Electro-luminescence spectrum, I-V and P-T characteristics were measured and compared with a reference structure. It was found that measured thermal impedance is about five times higher than for devices on a host GaAs wafer. Simulation of thermal behavior was done for bonded and non-bonded structure. It was found that measured values of thermal impedance are in good agreement with simulation results.