Hybrid InGaAs focal plane arrays are very interesting for night vision because they can benefit from the nightglow
emission in the Short Wave Infrared band. Through a collaboration between III-V Lab and CEA-Léti, a 640x512 InGaAs
image sensor with 15μm pixel pitch has been developed.
The good crystalline quality of the InGaAs detectors opens the door to low dark current (around 20nA/cm<sup>2</sup> at room
temperature and -0.1V bias) as required for low light level imaging. In addition, the InP substrate can be removed to
extend the detection range towards the visible spectrum.
A custom readout IC (ROIC) has been designed in a standard CMOS 0.18μm technology. The pixel circuit is based on a
capacitive transimpedance amplifier (CTIA) with two selectable charge-to-voltage conversion gains. Relying on a
thorough noise analysis, this input stage has been optimized to deliver low-noise performance in high-gain mode with a
reasonable concession on dynamic range. The exposure time can be maximized up to the frame period thanks to a rolling
shutter approach. The frame rate can be up to 120fps or 60fps if the Correlated Double Sampling (CDS) capability of the
circuit is enabled.
The first results show that the CDS is effective at removing the very low frequency noise present on the reference
voltage in our test setup. In this way, the measured total dark noise is around 90 electrons in high-gain mode for 8.3ms
exposure time. It is mainly dominated by the dark shot noise for a detector temperature settling around 30°C when not
cooled. The readout noise measured with shorter exposure time is around 30 electrons for a dynamic range of 71dB in
high-gain mode and 108 electrons for 79dB in low-gain mode.
Proc. SPIE. 7834, Electro-Optical and Infrared Systems: Technology and Applications VII
KEYWORDS: Staring arrays, Readout integrated circuits, Long wavelength infrared, Signal to noise ratio, Mercury cadmium telluride, Sensors, Electrons, Photodiodes, High dynamic range imaging, Prototyping
CEA-Leti MINATEC has been involved in infrared focal plane array (IRFPA) development since many years, with performing HgCdTe in-house process from SWIR to LWIR and more recently in focusing its work on new ROIC architectures. The trend is to integrate advanced functions into the CMOS design for the purpose of applications
demanding a breakthrough in Noise Equivalent Temperature Difference (NETD) performances (reaching the mK in LWIR band) or a high dynamic range (HDR) with high-gain APDs. In this paper, we present a mid-TV format focal plane array (FPA) operating in LWIR with 25μm pixel pitch, including a new readout IC (ROIC) architecture based on
pixel-level charge packets counting. The ROIC has been designed in a standard 0.18μm 6-metal CMOS process, LWIR n/p HgCdTe detectors were fabricated with CEA-Leti in-house process. The FPA operates at 50Hz frame rate in a snapshot integrate-while-read (IWR) mode, allowing a large integration time. While classical pixel architectures are limited by the charge well capacity, this architecture exhibits a large well capacity (near 3Ge-) and the 15-bit pixel level ADC preserves an excellent signal-to-noise ratio (SNR) at full well. These characteristics are essential for LWIR FPAs
as broad intra-scene dynamic range imaging requires high sensitivity. The main design challenges for this digital pixel
array (SNR, power consumption and layout density) are discussed. The electro-optical results demonstrating a peak NETD value of 2mK and images taken with the FPA are presented. They validate both the pixel-level ADC concept and its circuit implementation. A previously unreleased SNR of 90dB is achieved.
CEA Leti has recently developed a new readout IC (ROIC) with pixel-level ADC for cooled infrared focal plane arrays
(FPAs). It operates at 50Hz frame rate in a snapshot Integrate-While-Read (IWR) mode. It targets applications that
provide a large amount of integrated charge thanks to a long integration time. The pixel-level analog-to-digital
conversion is based on charge packets counting. This technique offers a large well capacity that paves the way for a
breakthrough in NETD performances. The 15 bits ADC resolution preserves the excellent detector SNR at full well
(3Ge-). These characteristics are essential for LWIR FPAs as broad intra-scene dynamic range imaging requires high
sensitivity. The ROIC, featuring a 320x256 array with 25μm pixel pitch, has been designed in a standard 0.18μm CMOS
technology. The main design challenges for this digital pixel array (SNR, power consumption and layout density) are
discussed. The IC has been hybridized to a LWIR detector fabricated using our in-house HgCdTe process. The first
electro-optical test results of the detector dewar assembly are presented. They validate both the pixel-level ADC concept
and its circuit implementation. Finally, the benefit of this LWIR FPA in terms of NETD performance is demonstrated.
CEA-Leti has developed a new 320x256 hybrid focal plane array (FPA) for flash LADAR imaging. The detector array
consists of 30μm pixel pitch MWIR HgCdTe avalanche photodiodes operating at 80K and the readout integrated circuit
(ROIC) is fabricated on a standard 0.18μm CMOS process. The custom ROIC can operate as a passive thermal imager or
a flash LADAR imager. In this second mode, each pixel will provide the time of flight measurement (3D) and the
returned intensity (2D) of one laser pulse. For the first laboratory trials the e-APD photodiode array performances were
measured in passive mode and the same FPA was then tested in one shot LADAR mode. This paper describes the
readout IC pixel architecture and reports the first electro-optical test results in both passive and active modes. This new
prototype takes advantage of the latest developments of the partnership between Sofradir and CEA-Leti.
This paper presents recent development made at CEA-LETI on manufacturing and characterization of planar p-on-n
HgCdTe photodiodes on long-, mid- and short-wavelength. HgCdTe (MCT) layer was grown both by liquid-phase
epitaxy (LPE) and by molecular beam epitaxy (MBE) on lattice matched CdZnTe (CZT). The n-type MCT base layer
was obtained by indium doping. Planar p-on-n photodiodes were manufactured by arsenic doping, which has been
activated by post-implanted annealing in Hg overpressure. As incorporation is achieved either by implantation or by
incorporation (during MBE growth). Electro-optical characterizations on these p-on-n photodiodes were made on FPAs.
Results show excellent operabilities (99.95% with ±0.5×mean value criterion) in responsivity and NETD and
background limited photodetectors. For long-wavelength FPAs, dark current is very low, leading to a R0A product
comparable to the state of the art at cut-off wavelength of λc = 9.2 μm. MBE mid-wavelength FPAs present very low
responsivity dispersion, reaching 1.1%. Comparisons are made between implantation and growth incorporation As
LETI has been involved in IRFPA development since 1978; the design department (LETI/DCIS) has focused its
work on new ROIC architecture since many years. The trend is to integrate advanced functions into the
CMOS design to achieve cost efficient sensors production. Thermal imaging market is today more and more
demanding of systems with instant ON capability and low power consumption.
The purpose of this paper is to present the latest developments of fixed pattern noise continuous time correction.
Several architectures are proposed, some are based on hardwired digital processing and some are purely analog.
Both are using scene based algorithms. Moreover a new method is proposed for simultaneous correction of pixel
offsets and sensitivities. In this scope, a new architecture of readout integrated circuit has been implemented; this
architecture is developed with 0.18μm CMOS technology. The specification and the application of the ROIC are
discussed in details.
In this paper, we report the fabrication and electro-optical characterization of both long-wavelength (LWIR) and middle-wavelength
(MWIR) p-on-n infrared photodiodes in HgCdTe. LWIR and MWIR HgCdTe epitaxial layers were grown
by liquid phase and molecular beam epitaxy respectively. p-type doping was obtained by arsenic implantation and n-type
doping by indium incorporation during growth.
The arsenic concentration profile determined by Secondary Ion Mass Spectroscopy showed multi-component diffusion
after Hg post-implant annealing. The process yields an arsenic activation efficiency of around 50%, estimated from
MEMSA (Maximum Entropy Mobility Spectrum Analysis) measurements. The damage induced by arsenic implantation
into HgCdTe have been examined by transmission electron microscopy (TEM) and suggest the formation of an array of
dislocations loops after arsenic implantation. However, after annealing under Hg overpressure, the impact of
implantation falls below the sensitivity of the TEM, suggesting that annealing effectively suppresses most of the defects.
The p-on-n photodiodes showed low leakage currents (shunt resistance>100 MOhms) and typical RoA values
comparable to the state of the art (RoA>4000 Ω.cm<sup>2</sup> for λc=9.2 μm at 77K). Finally, first results on p-on-n focal plane
arrays realized at CEA-LETI will be presented.
We report the latest developments of MW HgCdTe electron initiated avalanche photo-diodes (e-APDs) focal plane
arrays (FPAs) at CEA-LETI. The MW e-APD FPAs are developed in view of ultra-sensitive high dynamic range
passive starring arrays, active 2D/3D and dual-mode passive-active imaging, which is why both the passive imaging
performance and the gain characteristics of the APDs are of interest. A passive mode responsivity operability of 99.9%
was measured in LPE and MBE e-APDs FPAs associated with an average <i>NETD</i>=12mK, demonstrating that dual mode
passive-active imaging can be achieved with LETI e-APDs without degradation in the passive imaging performance. The
gain and sensitivity performances were measured in test arrays and using a low voltage technology (3.3V) CTIA test
pixel designed for 3D active imaging. The CTIA and test arrays measurements yielded comparable results in terms of
bias gain dependence (<i>M</i>=100 at <i>V<sub>b</sub></i>=-7V), low excess noise factor (<i><F></i>=1.2) and low equivalent input current
(<i>I</i><sub>eq_in</sub><1pA). These results validated the low voltage CTIA approach for integrating the current from a HgCdTe e-APD
under high bias. The test array measurements demonstrated a relative dispersion below 2% in both MBE and LPE e-
APDs for gains higher than <i>M</i>>100, associated with an operability of 99%. The operability at <i>I</i><sub>eq_in</sub><1pA at <i>M</i>=30 was 95%. A record low value of Ieq_in=1fA was estimated in the MBE e-APDs at <i>M</i>=100, indicating the potential for using the MW e-APDs for very low flux applications. The high potential of the MW e-APDS for active imaging was
demonstrated by impulse response measurements which yielded a typical rise time lower than 100ps and diffusion
limited fall time of 900ps to 5ns, depending on the pixel pitch. This potential was confirmed by the demonstration of a
2ns time of flight (TOF) resolution in the CTIA e-APD 3D pixel. The combined photon and dark current induced
equivalent back ground noise at <i>f/</i>8 with a cold band pass filter at λ=1.55μm was 2 electrons rms for an integration time
CEA Leti has demonstrated the good performances of its MWIR HgCdTe avalanche photodiode arrays. Gains above 20
at a moderate bias voltage of 5V have typically been measured with an excess noise factor of only 1.2. The next
generation of infrared focal plane arrays will take advantage of these characteristics to address new applications, reduce
system complexity and enhance performances. One of the main opportunities offered by avalanche photodiode detectors
concerns long range active imaging. This paper reports the development of two novel pixel architectures for 3D active
imaging based on flash LADAR technology. Both pixels have been designed in a standard 0.35μm CMOS process and
perform time-of-flight measurement in addition to 2D intensity imaging with a single emitted laser pulse. The analog
input circuits have been optimized to allow fast pulse detection while providing robustness to process variability. A
small readout IC demonstrator has been fabricated and coupled to a 10x10 avalanche photodiode array at 40μm pixel
pitch. The first test results in lab conditions show good
electro-optical performances with a ranging resolution around 30cm (2ns).
This paper firstly presents an asynchronous analog to digital technique that is well suited for an in-pixel implementation
in an X-ray or Infra-Red image sensor. The principle which consists in counting charge packets coming from the detector
is also called "charge-balancing technique". Simulation and experimental results on a 0.13μm process test-chip are given
and a 16 bit dynamic range is reached. Secondly a new enhancement method is described. This method controls the LSB
of the A/D conversion as the input current (from the detector) varies, so that a floating point coding is carried out. The
consequences are a wider dynamic range (19 bits at least) as well as a reduction of the technological fluctuations
between two different pixels. On this work in progress, implementation in a 150x150μm<sup>2</sup> pixel is briefly commented.
Thermal imaging market is today more and more attracted by systems with "instant-on" and low power consumption. "TECless" operation of uncooled microbolometer detectors, that is where no Peltier module is needed, is one of the major features required by the market. In order to fulfill this demand, LETI/SLIR is developing and optimizing a new IRCMOS architecture based on a differential reading implemented with current mirrors. This design simultaneously reduces focal plane temperature sensitivity and simplifies the detector driving. An IRCMOS prototype (320 × 240 with a pitch of 25 μm) has been designed, processed, and characterized. This paper presents an overall view of this new design and the latest characterization results of the prototype.
LETI has been involved in IRFPA development since 1978, the design department (LETI/DCIS) has focused its work on new ROIC architecture since many years. The trend is to integrate advanced functions into the CMOS design in the aim of making cost efficient sensors.
The purpose of this paper is to present the latest developments of an Analog to Digital Converter embedded in a 25μm pixel.
The design is driven by several goals. It targets both long integration time and snapshot exposure, 100% of image frame time being available for integration. All pixels are integrating the IR signal at the same time. The IR signal is converted into digital by using a charge packet counter. High density 130nm CMOS allows to use many digital functions such as counting, memory and addressing.
This new structure has been applied to 25μm pitch bolometer sensors with a dedicated 320 x 240 IRCMOS circuit. Due to smart image processing in the CMOS, the bolometer architecture requirements may become very simple and low cost. The room temperature sensitivity and the DC offset are solved directly in the pixel. This FPA targets low NETD (<50mK), a variation of 80 Kelvin for the FPA temperature, 14 bits output at 50/60Hz video rate.
Thermal imaging market is today more and more attracted by systems with "instant-on" and low power consumption.
Therefore the "TECless" operation of uncooled microbolometer detectors, that is where no Peltier module is needed, is
the major step to fulfill the market requirement. In order to fulfill this trend, LETI/SLIR is working on a new IRCMOS
architecture. This new design is based on a differential reading implemented with current mirrors that simultaneously
reduces focal plane temperature sensitivity and simplifies the detector driving. An IRCMOS prototype (320 x 240 with
a pitch of 25 &mgr;m) has been designed, processed, and characterized. This paper presents an overall view of this new
design and the preliminary characterization results got from this focal plane array.