In this paper, the possibility of using the static charge that accumulates on aircraft during flight as a source to power monitoring sensors is examined. The assessed methods include using a pair of materials with different air-flow charging rates, contact discharging of the fuselage to neutral metallic bodies, charge motion induction by the fuselage field and inductive harvesting of fuselage-to-air corona discharges at static discharge wicks. The installation and potential advantages of each method are discussed. The feasibility of directly charging a storage capacitor from accumulated static charge is studied experimentally, demonstrating a voltage of 25V on a 25nF capacitor.
In this paper, a sensor system architecture for laboratory and in-vivo light scattering studies on blood cells is presented. It aims at correlating Mie scattering to compositional and physiological information of blood cells towards a non-invasive blood-cell counting sensor. An overview of previously reported experimental techniques on light scattering from blood cells is presented. State-of-the-art methods such as differential pulse measurements, vessel pressure optimization identified as promising for enhancing the scattering signal in such measurements. Indicative simulations of Mie scattering by blood cells are presented, illustrating the potential for distinguishing among cells and identifying size distribution. A prototype sensor system based on a 640-660 nm laser light source and a photo diode array is implemented and programmed to obtain mean amplitude and scattering angle measurements.
Aircraft sensors are typically cable powered, imposing a significant weight overhead. The exploitation of temperature variations during flight by a phase change material (PCM) based heat storage thermoelectric energy harvester, as an alternative power source in aeronautical applications, has recently been flight tested. In this work, a scaled-down and a scaled-up prototype are presented. Output energy of 4.1 J per gram of PCM from a typical flight cycle is demonstrated for the scaled-down device, and 3.2 J per gram of PCM for the scaled-up device. The observed performance improvement with scaling down is attributed to the reduction in temperature inhomogeneity inside the PCM. As an application demonstrator for dynamic thermoelectric harvesting devices, the output of a thermoelectric module is used to directly power a microcontroller for the generation of a pulse width modulation signal.
Rotation of structures fabricated by planar processing into out-of-plane orientations can be used to greatly increase
the 3-dimensionality of microstructures. Previously this has been achieved by a self-assembly process based on surface
tension in meltable hinges. An important application is in fabricating vertical inductors on silicon, to reduce the substrate
coupling and thus increase quality factor and self-resonance frequency. Previous processes have used copper tracks, and
Pb-Sn hinges. However, the use of Cu limits potential applications because of oxidation, since the final structure is not
embedded. Moreover, a substitute hinge material is also required, as a result of legislative restrictions on Pb use. In this
paper, Au is used as an alternative to Cu for the fabrication of self-assembled 3D inductors. A process has been
developed to overcome photoresist deterioration problems due to the alkaline nature of Au electro-deposition solutions.
Furthermore, pure Sn is used instead of Pb-Sn as the hinge material. A Ni metal layer is introduced between the Au coils
and the Sn hinge to prevent inter-diffusion and formation of eutectic Au-Sn compounds. Finally a gold capping
technique is proposed to protect the Sn hinge from oxidation during hinge reflow. The fabrication techniques developed
here are compatible with post-processing on active CMOS circuits, and can be adopted for other MEMS applications.
Multi-project-wafer (MPW) services provide an economical route for prototyping of new electronic circuit designs.
However, addition of MEMS functionality to MPW circuits by post-processing (also known as MEMS-last processing) is
difficult and inefficient because MPW typically yields individual dies. One solution to this problem is to embed the
MPW dies in a carrier wafer prior to MEMS processing. We have developed a process which allows 300 μm-thick
CMOS dies to be embedded in a BSOI (bonded silicon-on-insulator) carrier prior to low-temperature processing for
integration of metal MEMS. Deep reactive ion etching (DRIE) with an STS Multiplex ICP etcher is used to form
cavities in the device layer of a BSOI wafer. By adjusting the passivation and etching cycles, the DRIE process has been
optimized to produce near-vertical sidewalls when stopping on the buried oxide layer. The cavity sizes are closely
matched to the die dimensions to ensure placement of the dies to within ±15 μm. Dies are placed in all the cavities, and
then a photoresist layer is deposited by spin-coating and patterned to provide access to the required IC contact pads. The
photoresist has the dual role of securing the dies and also planarizing the top surface of the carrier. After an appropriate
baking cycle this layer provides a suitable base for multi-level electroplating or other low-temperature MEMS