Post exposure bake (PEB) process among the lithography steps is important for making good patterns when the
chemically amplified resist is used. During the PEB, the de-protection reaction and the acid diffusion are
determined by bake temperature and time. One of the key factors that determine the de-protection and acid
diffusion is the initial temperature rising inside the photoresist. The time delay due to the temperature rising
from the room temperature to the pre-set bake temperature is the main cause of line width variation. It is very
important to control 1~2 nm line width variation for patterns of 32 nm and below. This variation mainly comes
from PEB temperature and time of the resist on top of the multi-stacking silicon wafer on hot plate. In order to
predict the accurate PEB temperature and time applied to the resist, we studied heat transfer from hot plate to
the resist on top of the silicon wafer. We calculated boundary temperature values of each layer and compared the
change of temperature caused by different kinds and thicknesses of sublayers including antireflection coating
and resist. In order to predict bake temperature, we have to consider the heat loss which was made by the
temperature differences with surrounding air, conductivity difference of various layer, and nitrogen purge during
the PEB process. Therefore, heat loss to the environment is included to solve real heat conduction problem in
the hot plate of the track system. We also found that the resultant line width was changed by small temperature
variation, stack thickness and layer numbers.
According to the ITRS roadmap, DRAM half pitch (hp) will reach to 32 and 20 nm in 2012 and 2017
respectively. However, it is difficult to make sub-40 nm node by single exposure technology with currently
available 1.35 numerical aperture (NA) ArF immersion lithography. Although it is expected to enable 32 nm hp
with either double patterning technology or extreme ultra-violet lithography, there are many problems to be
solved with cost reduction. Thus, the study of high-index fluid immersion technology should be pursued
simultaneously. ArF water immersion systems with 1.35 NA have already introduced for 40 nm hp production.
ArF immersion lithography using high-index materials is being researched for the next generation lithography.
Currently, many studies are undergoing in order to increase NA with higher index fluid and lens in immersion
technology. The combination of LuAG (n=2.14) and third-generation fluid could be used to make 1.55 NA. This
combination with 0.25 k1, 32 nm hp can be obtained by single exposure technology. In order to check the
realization of this process and to check the possible process hurdles for this high NA single exposure technology,
32 nm hp with 1:1 line and space patterning is tried. Various illumination conditions are tried to make 1:1 32 nm
hp and the exposure and develop conditions are varied to check whether this single exposure can give
processible window. As a result, 32 nm hp can be obtained by single exposure technology with 1.55 NA.
We applied the immersion lithography to get 32 nm node pattern with 1.55 NA, without using double exposure /
double patterning. A chromeless phase shift mask is compared with an attenuated phase shift mask to make 32 nm
dense 1:1 line and space pattern. We compared the aerial image, normalized image log slope, exposure latitude,
and depth of focus for each mask type in order to see the effect of the post exposure bake and acid diffusion length.
The process window shrinks fast if the diffusion length is larger than 10 nm for both mask types. However, up to
20 nm diffusion length, 32 nm can be processible if the exposure latitude of 5% is used in production.