Hotspot management in low k1 lithography is essential for the achievement of high yield in the manufacture of devices. We have developed a mask quality assurance system with hotspot management based on lithography simulation with SEM image edge extraction of actual mask patterns. However, there are issues concerning this hotspot management from the viewpoint of hotspot sampling and turnaround time.
To solve these problems, we modify the mask quality assurance system by introducing dynamic adaptive sampling in which hotspots are sampled depending on actual mask fabrication quality. As a result, producer's and consumer's risks are efficiently reduced, and TAT for mask inspection is also reduced.
This paper proposes new scanner fleet management utilizing programmed hotspot patterns.
We have developed a methodology to control and adjust critical parameters of scanner, such as effective illumination
shape and numerical aperture (NA), to obtain the same lithography performance. The purpose is to improve hotspot
patterns and depth of focus (DOF) of each scanner. The method is carried out with a test mask having programmed
hotspot patterns that are likely to become fatal errors for circuit reliability in wafer processing. Actual circuit patterns
whose patterning fidelity is sensitive to the critical parameters are selected as the programmed hotspots. The mask also
has various lithography process monitor marks, such as flare monitor pattern, MEF evaluation pattern and aberration
monitor pattern, for OPE control and simulation. Using the same test mask for every scanner, we can reveal the variation
of lithography performance within a "scanner fleet".
The hotspot patterns on the mask and the patterns printed onto wafers are inspected by Die-to-Database (D2DB) EB
inspection and a wafer D2DB EB inspection, respectively. Using those D2DB inspection systems, we can evaluate
quantitatively the change of pattern shape from drawing data to wafer. The OPE adjustment and OPC feedback are
corrected by using the simulation data acquired for the D2DB inspection. The quality of the evaluation provides accurate
scanner fleet control, resulting in high productivity and cost effectiveness at wafer fabrication.
Mask topography has effects on important components of optical image formation at 45nm node and beyond, and
therefore, the lithography simulation model required for hotspot-based mask quality assurance has to incorporate mask
topography effects. Since calculation of mask topography effects involves physical phenomena different from those
encountered in resist processes, we propose the concept of the mask & resist dual fitting method that splits the general
experimental model into the experimental resist model and the experimental mask model. To realize mask & resist dual
fitting, we have developed an experimental mask model, namely, the mask topography approximate model. The mask &
resist dual fitting method can improve model fitting accuracy and improve prediction accuracy at hotspots.
This paper proposes a new virtual lithography system to improve the productivity of high-mix / low-volume production. In the case of the conventional technique, product mask and wafer are used to determine a focus-exposure-matrix (FEM) exposure condition.
The conventional technique is a "send-ahead" process involving exposure, metrology and data analysis that decreases productivity of manufacturing. In the case of low-volume/high-mix ASIC manufacturing, such a send-ahead process is particularly time-consuming and costly. Moreover, the exposure condition setting imposes a huge workload that is desirable to be avoided from the viewpoints of cost and TAT. Thus, a new methodology to determine exposure dose conditions for each mask in high-mix / low-volume production is required.
In this paper, we propose a virtual lithography system to eliminate send-ahead exposure. Firstly, to improve wafer CD prediction accuracy, we rebuild the system, thereby transforming it from a training-based system to a simulation-based system. To make simulation models, we use a golden mask, which is not a product mask. Secondly, exposure conditions are determined by considering 2D patterns including hotspot patterns. Thirdly, the lithography simulation is carried out for each exposure tool. Using the golden mask, we calibrate simulation models for each exposure tool<sup>1-3</sup>. Various patterns including hotspots likely to become fatal errors for circuit reliability due to process proximity effects are considered. The virtual system provides optimal exposure parameters according to product and layer, considering long-term variation of exposure tool conditions. By developing this system, TAT and cost for the determination of exposure parameters will be improved. Elimination of send-ahead wafers can reduce TAT from mask delivery to exposure condition setup in high-mix / low-volume production. Drastic cost reduction is realized in high-mix / low-volume production.
Optical proximity correction (OPC) is an essential technology for critical dimension (CD) control in Low-k1 lithography. As technology node becomes tighter, more aggressive OPC is required. However, the number of so-called HOT-SPOTS is increasing dramatically. To apply OPC correctly and efficiently, we should consider the total optimization of the process in close connection with data processing, reticle and wafer fabrication process. Conventional one-dimensional CD measurement is no longer suitable for complicated two-dimensional (2D) patterns generated by OPC (e.g. JOG and SERIF). For quality assurance of mask pattern, a metrology of complicated 2D OPC patterns has been required. In our previous report, we proposed a lithography simulation based on edge extraction from a fine pixel SEM image of an actual photomask. This method is very effective for evaluating quality of 2D OPC mask patterns. Employing the method, we developed a system for guaranteeing 2D OPC patterns before shipping the mask to a wafer factory (Fig. 1). In PMJ2005, we presented some specifications required for an SEM, which was one of the key factors of this method. We estimated how factors such as field of image, image resolution, positioning error, and image magnification affect lithography simulation based on fine pixel SEM image. For mask pattern quality assurance of hp65, we found that the field of image of larger than 16μm square, the pixel size of less than 3nm, the positioning error of within +/- 1μm and the magnification error of less than 0.3% were acceptable (Table 1). Under these conditions, wafer image can be predicted with sufficient accuracy by the simulation. And then, in BACUS2005, we reported on a new SEM that was able to satisfy these specifications. In this paper, we report some evaluation results of distortion caused by not only magnification error but also rotation and position error using actual fine pixel SEM image. We will also present our evaluation results of the errors in various pattern conditions such as Dark Field/Bright Field, Pattern density.
We evaluated the accuracy of the simulation based on mask edge extraction for mask pattern quality assurance. Edge extraction data were obtained from SEM images by use of TOPCON UR-6080 in which high resolution (pixel size of 2nm) and fine pixel SEM image (8000 x 8000 pixels) acquisition is possible. The repeatability of the edge extraction and its impact on wafer image simulation were studied for a normal 1D CD prediction and an edge placement error prediction. The reliability of the simulation was studied by comparing with actual experimental exposure results with an ArF scanner. In the normal 1D CD prediction, we successfully obtained good repeatability and reliability. In 65nm node, we can predict a wafer CD with the accuracy of less than 1 nm using the simulation based on mask edge extraction. In the edge placement error prediction mode, the simulation accuracy is ~5 nm including edge extraction repeatability and the uncertainty of lithography simulation model.
The simulation with edge extraction more accurately predicts the resist pattern at line-end in which the actual mask pattern may be varied from the mask target (CAD) than a conventional simulation in which CAD is used as a mask pattern. This result supports the view that the wafer simulation with edge extraction is useful for mask pattern quality assurance because it can consider actual mask pattern shape.
We investigated the specifications of scanning electron microscope required for the lithography simulation based on the edge data extracted from an actual reticle pattern in the assurance of reticle pattern in which two-dimensional optical proximity correction is applied. Impacts of field of view, positioning error and image distortion on a lithography simulation were studied experimentally. For the reticle pattern assurance in hp90, the field of view of larger than 16 μm squares, the positioning error within +/- 1 μm and the magnification error of less than 0.3% are needed. Under these conditions, wafer image can be predicted with sufficient accuracy by the simulation.
Experiments concerning silicon oxide deposition using a focused ion beam were carried out in order to apply silicon oxide as insulator in integrated circuit modification. Silicon oxide film was formed using a 25-keV gallium focused ion beam with a mixed gas of 184.108.40.206- tetramethylcyclotetrasiloxane and oxygen. The deposited film consisted of mainly silicon and oxygen, which was analyzed by micro-Auger electron spectroscopy. It also contained 5 percent gallium, but carbon content was below noise level. The ratio of silicon to oxygen was 1 to 2. It was found that carbon content depended on oxygen used as deposition source gas. The resistivities of the eight deposited silicon oxide films were measured. The resistivities wer 28-79 M(Omega) cm at 5 volts and these values did not change significantly even after the samples were left in a room for three months. It was determined that it will be possible to use deposited silicon oxide for integrated circuit modification.
A design and a fabrication of multiple beam generators using zone plate array are reported, considering intensity distribution of a Gaussian beam. A multiple beam generator is composed of 10 X 10 circular zone plates with 5 kinds of zone radius ranging from 0.42 mm to 0.85 mm, considering intensity distribution of a Gaussian beam. The focusing characteristics are examined at 0.78 micrometers in wavelength of LD under normal incidence condition. The focusing intensity nonuniformity was corrected such that 10 multiple focusing spots with relative intensity fluctuation less than 20% were achieved. Feasibility of application to high speed opto-electronic integrated circuit is discussed.