Introduction of ArF lithography has opened the era of sub-90nm patterning. Though the definable feature size was much reduced, poor etch durability and pattern collapse of ArF photoresist make it difficult to extend current patterning process into sub-80nm based on single layer resist scheme. To overcome these obstacles, some alternatives have been proposed, which are composed of thin imaging layer and mask layer with high etch resistance. One of high potential candidates is bi-layer resist (BLR) process, in which Si containing imaging layer is oxidized as a hard mask during dry development. In our previous reports, comparison of several types of bi-layer resists was discussed. Silsesquioxane (SSQ)-based bi-layer resist proved to be the most promising one with no detectable Si outgassing and high Si content. In our experiment, novel SSQ type BLR showed comparable lithographic performance to single layer resist (SLR) in terms of depth of focus (DOF), process window and critical dimension (CD) uniformity for 80-nm node line and space (L/S) patterning. 65nm 1:1 L/S pattern was also resolvable with 0.85 NA ArF scanner in bilayer resist scheme. High selectivity more than 5 was accomplished with vertical profile in the dry development and sub-70nm line patterning could be achieved with trimming technique.
As k1 factor approaches the theoretical limit, optical proximity correction (OPC) treatments necessary to maintain dimensional tolerances involve increasingly complex correction shapes. This translates to more detailed, or larger mask pattern databases. Moreover, development of exposure tools lags behind the shrinkage of device. This may result in dwindling of process margin in lighographic process despite using all possible resolution enhancement techniques (RETs). Although model-based OPC may lose its effectiveness in case of narrower photolithographic process margin, model-based OPC is recognized as a robust tool to cope with the diversity of layout. By the way, in case of narrower photolithographic process margin, model-based OPC lose its effectiveness. To enhance the usefulness of the OPC, we need to overcome many obstacles. It is supposed that the original layout be designed friendly to lithography to enhance the process margin using aggressive RETs, and is amended by model-based OPC to suppress the proximity effect. But, some constraints are found during an OPC procedure. Ultimately, unless the original lithgraphy friendly layout (LFL) is corrected in terms of pitches and shapes, the lithography process is out of process window as well as makes pattern fidelity poor. This paper emphasizes that the application of model-based OPC requires a particular and unique layout configuration to preserve the process margin in the low k1 process.
We investigated the effect of surfactant-added rinse and soft bake conditions on the pattern collapse in sub-100nm ArF lithography. Pattern collapse was estimated by comparing the critical dimension (CD) and the frequency at which collapse occurred. Collapse could be improved by using surfactant solutions, but the extent was different from the model study concerning the contact angle and surface tension at equilibrium state only. From dynamic surface tension data, we found that surface tension in dynamic mode was more important than that in static mode when spin drying method was used. During the study we found that pattern collapse occurred much easily at the edge of wafer. By increasing bake time or temperature after resist coating, we could decrease the positional difference in the pattern collapse. It is supposed that these results come from the relaxation of internal stress in resist during spin coating