Up to now, Miniaturization has been the main drive for improving the performance of semiconductors. And higher performance of semiconductor has been the drive for applications. But miniaturization has become increasingly difficult due to increased power consumption and variations in characteristics. In order to solve these problems, by not only miniaturization of semiconductor elements, but also heterogeneous integration of the IC chips with advanced packaging technology, the higher performance and functionality improvement of the entire system has been proposed and developed. For example, the integrated SoC of the GPU and the High Bandwidth Memory (HBM) via Silicon-interposer(2.5D) are manufactured for high-performance computing, like machine learning and deep learning. With this flow, the wiring of the organic substrate package is also becoming finer line. Furthermore, it is necessary to increase the size of the die. In the following packaging trend, requiring of the Lithography equipment and process for advanced packaging is not only fine wiring to integrate but also large area exposure. In this presentation, we will show the exposure results of various dry film resist by the panel-size lithography system and inspect the state of resolution. The shot size of the lithography system is 250*250mm. Finally, we will discuss the next lithography system and process from the perspective of lithography optics and process.