The design of a biwavelength transceiver (TRx) module for parallel simultaneous bidirectional optical interconnects is described. The TRx module has been implemented using two different wavelengths, 850 and 1060 nm, to send and receive signals simultaneously through a common optical interface while optimizing cost and performance. Filtering mirrors are formed in the optical fibers which are embedded on a V-grooved silicon substrate for reflecting and filtering optical signals from/to vertical-cavity surface-emitting laser (VCSEL)/photodiode (PD). The VCSEL and PD are flip-chip bonded on individual silicon optical benches, which are attached on the silicon substrate for optical signal coupling from the VCSEL to fiber and from fiber to the PD. A high-speed and low-loss ceramic printed circuit board, which has a compact size of 0.033 cc, has been designed to carry transmitter and receiver chips for easy packaging of the TRx module. Applied for quad small form-factor pluggable applications at 40-Gbps operation, the four-channel biwavelength TRx module showed clear eye diagrams with a bit error rate (BER) of 10 −12 at input powers of −5 and −5.8 dBm for 1060 and 850 nm operation modes, respectively.
An analog-type high-speed serializer/deserializer (SerDes) has been designed for optical links especially between CPU
and memory. The circuit uses a system clock and its phases to multiplex data to the serial link which avoids the need for
a PLL-based high frequency clock generation used in serializing parallel data as in conventional SerDes design. The
multiplexed link combined with the de-serializing clock is used as a reference signal for de-serialization. The SerDes is
being designed in a 0.13 μm Si-CMOS technology. The fabricated serializer has a core chip size of 360 x750 μm<sup>2</sup>. Power
dissipation for the SerDes is 71.4 mW operating up to 6.5 Gbps.