As advanced semiconductor technologies continue to shrink, there is a continued need for interconnect performance and variability to keep pace. Traditional area scaling alone cannot control the increased process variation at advanced nodes. We examine the impact that patterning scheme has on the final interconnect resistance, capacitance and RC variability at sub-36nm pitches. Industry standard patterning schemes are evaluated using the Monte Carlo method. Single exposure (direct print), litho-etch-litho-etch, self-aligned double patterning and self-aligned quadruple patterning (SAQP) are considered. In the context of these patterning schemes, lithographic variation and spacer thickness uniformity (where applicable) are evaluated.
Pending the availability of actinic inspection tools, optical inspection tools with 193 nm DUV
illumination wavelength are currently used to inspect EUV masks and EUVL-exposed wafers.
Due to strong optical absorption, DUV photons can penetrate only a few surface layers of EUV
masks, making them sub-optimal for detecting hidden defects embedded within the sub-layers of
the mask, the so-called phase defects. Although these phase defects may not be detected by
optical inspection tools, they may print on the wafer. Conversely, false and nuisance defects
which may not print on the wafer may be detected by optical inspection tools, and by so doing,
degrade the inspection sensitivity of the tool to real and critical defects. This paper discusses
approaches to optimizing the optical inspection sensitivity of EUV masks, with a view to
overcoming some of the absorption limitations of the inspection wavelength and also with a view
to enhancing the imaging contrast of the reflected light between the low reflective absorber/antireflection
coating stack and the moderately reflective mirror surface of Mo/Si bilayers, capped
with a thin Ru layer, and which serves to protect the mirror surface from damage and
contamination during mask fabrication and wafer printing processes. The effects of mask
absorber/ARC stack thickness on optical inspection contrast are simulated using rigorous
coupled wave analysis (RCWA), and compared to experimental results. EUV masks with thin
absorber/ARC stacks are observed to have higher inspection contrast, up to 15 % higher than
their thicker counterparts, especially as the feature pitch gets smaller. Blank defect inspection
performance of tools such as the Siemens DFX40 tool and KLA 617 Teron tool equipped with
Phasur module are compared, and correlated with patterned mask inspection data generated from
KLA 617 Teron tool. Patterned mask defect sensitivities to the tune of 40 nm and 90 nm were
obtained on thin and thick absorber/ARC stacks, respectively. The defect location accuracy of
the Teron 617 tool is better than 250 nm (3σ), while the alignment repeatability of the Teron 617
on the fiducials is better than 60 nm (3σ). Printability of mask blank and patterned mask defects
on exposed wafers in terms of what and where the defects print, are also presented. Four masks
with different absorber and antireflection coating thicknesses, some with substrate and absorber programmed defects of different types and sizes, were fabricated and used to expose resistcoated
SiN substrate wafers on full field ASML EUV scanners.
Detection of nuclear materials is critical in preventing traffic of illicit nuclear materials. Several methods that are based on detection of spontaneous or induced emission of fission neutron are considered. Efficient fast and thermal neutron detectors are generally required. For some applications these detectors must have fast response and should be deployed with large or small detection area.
This work expands upon the basic concept of coating a p-n junction solar cell with a neutron detection layer that typically employs either 6Li or 10B. 10B has a larger absorption cross section and results in higher detection efficiency. When an incident neutron interacts with 10B, it releases an α-particle and a 7Li ion; this α-particle excites electron-hole-pairs in the silicon p-n junction. This work investigated a variety of different silicon trench/pillar/hole geometries in combination with the 10B filling or coating; thermal neutron detection efficiencies as high as 30% are projected. It utilizes trenches spaced as closely as 2 μm and 50 μm deep. Simulations predict that when these single layer detectors are bonded in a multiple layer configuration, efficiencies in the range of 90% could be achieved.
Along with nuclear and electrical simulations, a highly controllable deep-reactive-ion-etching (DRIE) recipe is developed for trench/pillar/hole etching. The ability to create p-n junctions along those trenches is presented. Trenches and pillars as small as 2 μm by 2 μm are fabricated and p-n junctions are created along their surface. Smooth, uniform trenches are ready for trench refilling procedures.