Proc. SPIE. 6313, Advanced Signal Processing Algorithms, Architectures, and Implementations XVI
KEYWORDS: Digital signal processing, Visualization, Field programmable gate arrays, Laser induced plasma spectroscopy, Transform theory, Signal processing, Very large scale integration, Integrated circuits, Digital electronics, Computer arithmetic
In this work we present some improvements on hardware operators dedicated to the computation of power
operations with fixed integer exponent (x<sup>3</sup>, x<sup>4</sup>, . . .) in unsigned radix-2 fixed-point or integer representations.
The proposed method reduces the number of partial products using simplifications based on new identities and
transformations. These simplifications are performed both at the logical and the arithmetic levels. The proposed
method has been implemented in a VHDL generator that produces synthesizable descriptions of optimized
operators. The results of our method have been demonstrated on FPGA circuits.
In this work, we present a tool that generates division hardware units. This generator, called divgen, allows a fast and wide space exploration in circuits that involve division operations. The generator produces synthesizable VHDL descriptions of optimized division units for various algorithms and parameters. The results of our generator have been demonstrated on FPGA circuits.