Inverse lithography is increasingly being used as a viable OPC solution to maximize process window (PW), improve CD uniformity (CDU) and minimize the mask error factor (MEF), especially for memory devices. The device yield is typically limited by the process window of a few critical layers, and the Via layer is identified as one of the process window limiters for advanced 3D-NAND devices. To maximize the on-chip yield, ASML has developed advanced image based Mask-3D (M3D) inverse technology that can optimize freeform mask shapes and enhance design printability throughout the mask optimization flow. Mask rule checks (MRC) and side-lobe printing are optimized simultaneously to deliver the maximum process window. <p> </p>The advanced image based M3D inverse lithography technology (ILT) is used to perform full chip mask correction on the Via layer of a 3D-NAND device. 3D NAND devices contain highly repetitive cell and page buffer patterns. To ensure the full chip device performance, the consistency of the mask correction is important. Our strategy is to use the computationally intensive mask optimization solution from the new advanced image based M3D inverse technology to generate a freeform mask which gives the best lithography performance. We then use Tachyon’s Pattern Recognition and Optimization (PRO) engine to propagate the freeform mask solution of the repetitive patterns to the full chip. The periphery of the chip is optimized using conventional OPC methods. The simulation results from the advanced image based M3D inverse technology are compared against the baseline flow, which uses a standard inverse solution. The simulation results from both the flows are further validated on wafer. Significant improvement in overlapping process window (OPW) and CD uniformity is observed using the new advanced inverse technology. The simulation data shows a 32% improvement in depth of focus (DOF), a 5% improvement in the image log slope (ILS) and a 25% reduction in best focus shift (BFS) range. The improvement has also been verified at the wafer-level.
Advances on techniques that enable small technology nodes printing benefit the lithography with cost. For instance, lens heating draws people's attention when the NTD process is applied together with the bright tone mask. And the study of it requires the investigation of many other variables. In this paper we examine individual impact of several closely related process variables to understand the lens heating behavior. Meanwhile, though it is known that the PTD process is less sensitive to the lens heating effect, we do observe mask topography induced best focus shifts among different patterns with small spaces. It is of interest to discover the extent to which the NTD is affected. Thus in this paper we also compared the two processes with respect to the mask topography effect by simulating the best focus shifts of a series of test patterens.
More complex source and mask shapes are required to maximize the process window in low κ<sub>1</sub> era. In simulation, the improvement can be shown well with ideal source and mask shapes. However imperfection of the source and mask can cause critical dimension (CD) errors and results in smaller process margin than expected one. In this paper, it is shown
that how process margins can be improved with different source and mask complexities. Also the effect of source and
mask complexities on CD errors and process margin degradation is discussed. The error source of the electron beam
mask pattern generator is investigated and used for mask CD uniformity estimation with different mask complexity.
Mask manufacturability has been considered as a major issue in the adoption of inverse lithography (IL) in
practice. With smaller technology nodes, IL distorts the mask pattern more aggressively. The distorted mask
often contains curvilinear contour and irregular shapes, which cast a heavy computation burden on segmentation
and data preparation. Total variation (TV) has been used for regularization in previous work, but it is not very
effective in regulating the mask shape to be rectangular. In this paper, we apply TV regularization not only on
the mask image but also on the mask edges, which forces the curves of edges to be more vertical or horizontal,
because they give smaller TV values. Except for rectilinearity, a group of geometrical specifications of the mask
pattern set by mask manufacture rule control (MRC) is also important for mask manufacturability. To prevent
these characteristics from appearing, we also propose an intervention scheme into the optimization framework.
The continuous integrated circuit miniaturization and the shrinkage of critical dimension (CD) have pushed the
development of optical proximity correction (OPC), and also making CD more sensitive to process variations.
Traditional OPC optimizes mask patterns at nominal lithography conditions, which may lead to poor performance
with process variations. Hence, OPC software nowadays needs to take different process conditions into
consideration to enhance the robustness of layout patterns. In this paper, we propose an algorithm which considers
the defocus as a random variable when incorporating it into an inverse imaging framework to optimize the
input mask, in order to gain more robustness for a wider range of focus errors. The optimal mask is calculated in
a statistical manner by minimizing the expected difference between output patterns at different defocus conditions
and the target pattern. With the necessary tradeoff in the close proximity of the nominal focus condition,
the optimized mask gives more robust performance under a wider range of focus errors.