In this work, admittance analysis of organic light emitting diode (OLED) (anode/active layer/cathode) was performed at room temperature within the frequency range of 1 kHz-1MHz to find out transport properties of both injected carriers from each side. Moreover, by proper chosen metals, electron or hole only OLED devices were prepared and the measurement was resumed to identify the governed transport path of injected carrier. Mobility of injected carriers followed the Poole-Frenkel type conduction mechanism and distinguished in the frequency range due to the difference of transit times in admittance measurement. Beginning of light output and onset of negative capacitance took place at the turn-on voltage (or flat band voltage), 1.8 V, which was the difference of energy band gap of polymer and two barrier offsets between metals and polymer. The proposed analytical model for admittance, derived for the frequency dependent space charge limited behavior leading negative capacitance issues, was applied on the measured data for the present OLED device.
Large area (72 cm<sup>2</sup>) doping inversed HIT solar cells (n-a-Si:H/i-a-Si:H/p-c-Si) were investigated by High Resolution Transmission Electron Microscopy (HR-TEM), Spectroscopic Ellipsometry (SE), Fourier Transform Infrared Attenuated Total Reflection spectroscopy (FTIR-ATR) and current-voltage (I-V) measurement. Mixture of microcrystalline and amorphous phase was identified via HR-TEM picture at the interface of i-a-Si:H/p-c-Si heterojunction. Using multilayer and Effective Medium Approximation (EMA) to the SE data, excellent fit was obtained, describing the evolution of microstructure of a-Si:H deposited at 225 °C on p-c-Si. Cody energy gap with combination of FTIR-ATR analyses were consistent with HRTEM and SE results in terms of mixture of microcrystalline and amorphous phase. Presence of such hetero-interface resulted poor open circuit voltage, V<sub>oc</sub>, of the fabricated solar cell devices, determined by I-V measurement under 1 sun. Moreover, Voc was also estimated from dark I-V analysis, revealing consistent V<sub>oc</sub> values. Efficiencies of fabricated cells over complete c-Si wafer (72 cm2) were calculated as 4.7 and 9.2 %. Improvement in efficiency was interpreted due to the back surface cleaning and selecting aluminum/silver alloy as front contact.