A digital pixel CMOS focal plane array has been developed to enable low latency implementations of image processing systems such as centroid trackers, Shack-Hartman wavefront sensors, and Fitts correlation trackers through the use of in-pixel digital signal processing (DSP) and generic parallel pipelined multiply accumulate (MAC) units. Light intensity digitization occurs at the pixel level, enabling in-pixel DSP and noiseless data transfer from the pixel array to the peripheral processing units. The pipelined processing of row and column image data prior to off chip readout reduces the required output bandwidth of the image sensor, thus reducing the latency of computations necessary to implement various image processing systems. Data volume reductions of over 80% lead to sub 10μs latency for completing various tracking and sensor algorithms. This paper details the architecture of the pixel-processing imager (PPI) and presents some initial results from a prototype device fabricated in a standard 65nm CMOS process hybridized to a commercial off-the-shelf short-wave infrared (SWIR) detector array.
In this paper we present an overview of the laboratory configuration and provide details of the adaptive-optics and tracking hardware. Experimental results obtained using a variety of propagation scenarios are presented and compared with results from wave-optics simulations. In addition, we present results illustrating the impact of increasing beacon size and active illumination on system performance.
An infrared Hartmann-type wavefront sensor was assembled from a 32 X 32 lenslet array, fabricated by a binary-optic process on a germanium substrate, and a 128 X 128 pixel InSb detector, manufactured by Amber Engineering, Inc. The sensor was used to measure the wavefront of a hydrogen-fluoride laser beam from the TRW Alpha Verification Module.
Conference Committee Involvement (1)
Acquisition, Tracking, Pointing, and Laser Systems Technologies XXVI
23 April 2012 | Baltimore, Maryland, United States