Mask Process Correction (MPC) is well established as a necessary step in mask data preparation (MDP) for electron beam mask manufacturing at advanced technology nodes from 14nm and beyond. MPC typically uses an electron scatter model to represent e-beam exposure and a process model to represent develop and etch process effects . The models are used to iteratively simulate the position of layout feature edges and move edge segments to maximize the edge position accuracy of the completed mask. Selective dose assignment can be used in conjunction with edge movement to simultaneously maximize process window and edge position accuracy . MPC methodology for model calibration and layout correction has been developed and optimized for the vector shaped beam (VSB) mask writers that represent the dominant mask lithography technology in use today for advanced mask manufacturing . Multi-beam mask writers (MBMW) have recently been introduced and are now beginning to be used in volume photomask production . These new tools are based on massively parallel raster scan architectures that significantly reduce the dependence of write time on layout complexity and are expected to augment and eventually replace VSB technology for advanced node masks as layout complexity continues to grow . While it is expected that existing MPC methods developed for VSB lithography can be easily adapted to MBMW, a rigorous examination of mask error correction for MBMW is necessary to fully confirm applicability of current tools and methods, and to identify any modifications that may be required to achieve the desired CD performance of MBMW. In this paper we will present the results of such a study and confirm the readiness of MPC for multi-beam mask lithography.
As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask manufacturers. Techniques including advanced Optical Proximity Correction (OPC) and Inverse Lithography Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the new challenges are continued shrinking Sub-Resolution Assist Features (SRAFs), curvilinear SRAFs, and other complex mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible solutions to these coming challenges. In this paper, we study one such process, characterizing mask manufacturing capability of 10nm and below structures with particular focus on minimum resolution and pattern fidelity.
As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask
manufacturers. Techniques including advanced optical proximity correction (OPC) and Inverse Lithography
Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the
new challenges are continued shrinking sub-resolution assist features (SRAFs), curvilinear SRAFs, and other complex
mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements
over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature
resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible
solutions to these coming challenges. In this paper, Part 2 of our study, we further characterize an MBMW process for
10nm and below logic node mask manufacturing including advanced pattern analysis and write time demonstration.
Reticles for manufacturing upcoming 10nm and 7nm Logic devices will become very complex, no matter whether 193nm water immersion lithography will continue as main stream production path or EUV lithography will be able to take over volume production of critical layers for the 7nm node. The economic manufacturing of future masks for 193i, EUV and imprint lithography with further increasing complexity drives the need for multi-beam mask writing as this technology can overcome the influence of complexity on write time of today’s common variable shape beam writers. Local registration of the multi-beam array is a critical component which greatly differs from variable shape beam systems. In this paper we would like to present the local registration performance of the IMS Multi-Beam Mask Writer system and the metrology tools that enable the characterization optimization.
We present the design and implementation of a MEMS pressure sensor with an operation potential under harsh
conditions at high temperatures (T = 300 – 800°C). The sensor consists of a circular HEMT (C-HEMT) integrated on a
circular AlGaN/GaN membrane. In order to realize MEMS for extreme conditions using AlGaN/GaN material system,
two key issues should be solved: (a) realization of MEMS structures by etching of the substrate material and (b)
formation of metallic contacts (both ohmic and Schottky) to be able to withstand high thermal loads. In this design
concept the piezoresistive and piezoelectric effect of AlGaN/GaN heterostructure is used to sense the pressure under
static and/or dynamic conditions. The backside bulk micromachining of our SiC wafer in the first experiment started
with FS-laser ablation down to ~200 -270μm deep holes of 500μm in diameter. Because no additional intermediate layer
can stop the ablation process, the number of laser pulses has to be optimized in order to reach the required ablation
depth. 2D structural-mechanical and piezoelectric analyses were performed to verify the mechanical and piezoelectric
response of the circular membrane pressure sensor to static pressure load (in the range between 20 and 100kPa). We
suggested that suppressing the residual stress in the membrane can improve the sensor response. The parameters of the
same devices previously fabricated on bulk substrates and/or membranes were compared. The maxima of drain currents
of our C-HEMT devices on SiC exhibit more than four times higher values compared to those measured on silicon
With the willingness of the semiconductor industry to push manufacturing costs down, the mask
less lithography solution represents a promising option to deal with the cost and complexity concerns
about the optical lithography solution. Though a real interest, the development of multi beam tools still
remains in laboratory environment. In the frame of the seventh European Framework Program (FP7), a
new project, MAGIC, started January 1st 2008 with the objective to strengthen the development of the
mask less technology. The aim of the program is to develop multi beam systems from MAPPER and
IMS nanofabrication technologies and the associated infrastructure for the future tool usage. This paper
draws the present status of multi beam lithography and details the content and the objectives of the
For 90nm node and beyond technology generations, one of the most critical challenges is how to meet the local CD uniformity (proximity) and global CD uniformity (GCDU) requirements within the exposure field. Both of them must be well controlled in the mask making process: (1) proximity effect and, (2) exposure pattern loading effect, or the so-called e-beam "fogging effect". In this paper, we report a method to improve our global CDU by means of a long range fogging compensation together with the Leica SB350 MW. This exposure tool is operated at 50keV and 1nm design grid. The proximity correction is done by the software - package "PROXECCO" from PDF Solutions. We have developed a unique correction method to reduce the fogging effect in dependency of the pattern density of the mask. This allows us to meet our customers’ CDU specifications for the 90nm node and beyond.
Optimized process parameters using the TOK OEBR-CAN024 resist for high chrome load patterning have been determined. A tight linearity tolerance for opaque and clear features, independent on the local pattern density, was the goal of our process integration work. For this purpose we evaluated a new correction method taking into account electron scattering and process influences. The method is based on matching of measured pattern geometry by iterative back-simulation using multiple Gauss and/or exponential functions. The obtained control function acts as input for the proximity correction software PROXECCO. Approaches with different pattern oversize and two Cr thicknesses were accomplished and the results have been reported. Isolated opaque and clear lines could be realized in a very tight linearity range. The increasing line width of small dense lines, induced by the etching process, could be corrected only partially.
the Leica SB350MW 50keV shaped-beam e-beam lithography tool was used to write large-area 1X templates applicable in Step and Flash Imprint Lithography (S-FIL). This paper describes how information from the pattern analysis can be used to define the ZEP7000 resist exposure optimization technique for the SB350 MW tool together with the Motorola template pattern transfer process to obtain final template images in the transparent template. As a result of the complete process, well-resolved trenches measuring 33 nm and contacts as small as 44nm were obtained. Further improvements in the resist patterning will be possible by an adaptation of our standard proximity corrector (currently used in the 90 nm node maskmaking) with a high resolution upgrade.
A mask patterning technology for the 90nm technology node has been developed using the FujifilmARCH resist FEP171 and the state-of-the-art mask making tools SteagHamaTech mask coater ASR5000, Leica 50kV variable shaped e-beam writer SB350, SteagHamaTech developer ASR5000 and UNAXIS Mask Etcher III. A resist resolution of below 100nm dense lines and 150nm contact holes was demonstrated. The line width shrinking due to chrome etching varies between 25nm and 50nm per feature and a corresponding resolution of 125nm dense lines in a 105nm thick chrome absorber has been achieved. The global CD-uniformity with a 3σ of 7.7nm and a total range of 10.8nm met the requirements of the ITRS roadmap. The local uniformity with a 3σ of 3.8nm and a range of 5.6nm offers potential for future application of the Leica SB350. Applying of a new correction method taking electron scattering and process characeristics into account provides a linearity of 6.1nm. In addition, the line width of different featurees was kept in a range up to 12nm when the local pattern density was changed. The composite placement accuracy of 12nm fulfills already the requirements of the 65nm node. A special investigation proved the excellent fogging depression of the SB350.
Negative-tone chemically amplified resists MES-EN1G (JSR), FEN-270 (Fujifilm ARCH), EN-024M (TOK) and NEB-22 (Sumitomo) were evaluated for binary mask making. The investigations were performed on an advanced tool set comprising a 50kV e-beam writer Leica SB350, a Steag Hamatech hot/cool plate module APB5000, a Steag Hamatech developer ASP5000, an UNAXIS MASK ETCHER III and a SEM LEO1560 with integrated CD measurement option. We investigated and compared the evaluated resists in terms of resolution, e-beam sensitivity, resist profile, post exposure bake sensitivity, CD-uniformity, line edge roughness, pattern fidelity and etch resistance. Furthermore, the influence of post coating delay and post exposure delay in vacuum and air was determined.
This work involved a demonstration of the infrastructure and the ability of mask-making equipment to produce 9 inch reticles. While the choices for this particular work made the timing and logistics long and complicated, we find that there currently exists adequate infrastructure to create 9 inch reticles and we have used this ability to produce several demonstration quality examples.
The new capillary spin (CAP-Spin) coating principle, realized in the STEAG HamaTech ASR5000, was evaluated for mask making using chemically amplified resists.
Basic correlations between coating parameters, resist thickness and film uniformity were figured out. We achieved a film thickness uniformity of close to 2% total range after a process optimization based on our investigation results with the positive tone resist JSR KRS-XE.
Finally, the performance of ASR coated blanks was assessed on the basis of a binary mask making process using the Fuji FEP171 resist. The ASR5000 was integrated in an advanced tool set and the patterned reticles have met the requirements of the 100nm Technology Node in terms of resolution and CD-uniformity. No correlation between thickness and CD distribution could be observed.
The evaluated post coating and post exposure delay influence of FEP171 also confirms the usability of the ASR5000 coated substrates for advanced mask making.
An overview will be presented of high-resolution e-beam lithography equipment issues and processes used in the fabrication of photomasks/reticles needed for 100nm maskmaking. As reported and discussed repeatedly, the emerging advanced optical and next generation lithography for 100nm and beyond requires masks with a well controlled CD variation and high pattern placement accuracy. Our paper shows the possibility of 100nm patterning by using standard resist materials (e.g. ZEP 7000) or other advanced resist materials under optimized processing exposed with a 50keV shaped-beam vector-scan Leica SB350MW mask writer e-beam pattern generator. The presented results will show that this commercially available e-beam system together with built-in exposure optimization methods (proximity, local heating, fogging) meets the challenges of the 100nm device generation with extendibility to at least 70nm. Details of the exposure optimization possibilities, including a flexible determination method of proximity input parameters and resist-pattern transfer methods maintaining the required CD-control will be discussed also.
A method was developed to separate and quantitatively characterize a contribution of resist heating and proximity effects into CD-variation in electron-beam lithography. An experimental and theoretical study of these two effects were done using a 30 kV variably shaped beam system. TEMPTATION software tool was used to simulate temperature rise during electron exposures. Good agreement of experimental results and simulated data was found. A method was developed to measure proximity function which is free of resist heating influence.
Distortion of critical dimension (CD) is an important problem in electron beam lithography. Two main reasons for the distortions are proximity effects and resist heating. The influence of both these factors is examined for a 30 kV variably shaped electron beam lithography system. A change of linewidth with exposure dose was experimentally measured at variable exposure conditions of a pattern. In this way, the influence of resist heating was varied while electron scattering was constant. A simulation method was developed that allows one to take into account the contribution of proximity effects and resist heating to a linewidth change. An advanced model of resist heating was used for simulation. This method can be used to predict CD change. A technique for determination of a heat-to-dose transfer coefficient was proposed.
First piezoresistive AFM sensor developed by Quate was based on SOI technology. Alternative technology for fabrication of microtips integrated with silicon cantilever beam, used as a microprobe in atomic force microscopy, is described in this paper. It is based on a bulk micromachining to define the cantilever thickness, surface micromachining to develop sharp tip and standard IC planar processing. Specific sequence of plasma treated photoresist and hard masking steps followed by wet isotropic, wet anisotropic and dry etching is utilized to obtain very sharp silicon tips. First, HF/HNO<SUB>3</SUB> based polishing etchant is used to create mesa islands at the end of the formed cantilever. Next, a planar IC processing sequence is realized to fabricate piezoresistive Wheatstone bridge which will serve as a force sensing element. Thickness of the beam is precisely controlled by electrochemical etch-stop technique in. Then, sharp tip is formed by both RIE and/or wet etching, using under-cutting method. Finally, deep anisotropic silicon etching combined with SF<SUB>6</SUB>/Ar plasma etching is used to create cantilever silicon beam.
The suitability of pattern transfer through multi-component chemically amplified resists (CARs) has been studied. We report on direct-write electron-beam lithographic and reactive ion etching (RIE) experiments with single-layer CARs used for the fabrication of silicon structures with sizes from micro- down to submicrometer scale and high aspect ratio. The 30 keV e-beam response of new types of CARs in thicker layers and the optimization possibilities of the exposure and etching conditions were investigated as well. We measured the basic characteristics of used resists and also the influence of proximity effects. The study includes the effects of resist process variations on the global 3D resist-relief structure. The resolved resist- relief structures at optimized process conditions have shown high aspect ratios with nearly vertical sidewalls. The paper will discuss the deep pattern transfer results into the underlying SiO<SUB>2</SUB> and/or directly into Si-substrate by using RIE. The results show an etch that has excellent vertical sidewalls free of passivation, and is anisotropic.