Dr. Philippe Hurat
Product Management Director at Cadence Design Systems Inc
SPIE Involvement:
Publications (38)

Proceedings Article | 22 February 2021 Presentation + Paper
Proc. SPIE. 11614, Design-Process-Technology Co-optimization XV
KEYWORDS: Lithography, Visualization, Silicon, Manufacturing, Inspection, Profiling, Semiconducting wafers, Tolerancing, Design for manufacturability

Proceedings Article | 22 February 2021 Poster + Paper
Proc. SPIE. 11614, Design-Process-Technology Co-optimization XV
KEYWORDS: Semiconductors, Data modeling, Fin field effect transistors, Databases, Transistors, High volume manufacturing

Proceedings Article | 23 March 2020 Presentation + Paper
Proc. SPIE. 11328, Design-Process-Technology Co-optimization for Manufacturability XIV
KEYWORDS: Metals, Silicon, Manufacturing, Reliability, Design for manufacturing, Extreme ultraviolet lithography, Optical proximity correction, Semiconducting wafers, Yield improvement, Chemical mechanical planarization

Proceedings Article | 4 April 2019 Presentation + Paper
Proc. SPIE. 10962, Design-Process-Technology Co-optimization for Manufacturability XIII
KEYWORDS: Lithography, Optical lithography, Metals, Manufacturing, Extreme ultraviolet, CMOS technology, Extreme ultraviolet lithography, Double patterning technology, Computer aided design, Resolution enhancement technologies

Proceedings Article | 20 March 2018 Paper
Proc. SPIE. 10588, Design-Process-Technology Co-optimization for Manufacturability XII
KEYWORDS: Multilayers, Databases, Error analysis, Silicon, Legal, Optical proximity correction, Tolerancing, Integrated circuit design, System on a chip, Intellectual property

Showing 5 of 38 publications
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