Wenli Collison, Yii-Cheng Lin, Shannon Dunn, Hiroaki Takikawa, James Paris, Lucy Chen, Troy Detrick, Jun Belen, George Stojakovic, Michael Goss, Norman Fish, Minjoon Park, Chih-Ming Sun, Mark Kelling, Pinyen Lin
In the Global 450mm Equipment Development Consortium (G450C), a 193i guided directed self-assembly (DSA) pattern has been used to create structures at the 14nm node and below. The first guided DSA patterned wafer was ready for etch process development within a month of the G450C’s first 193i patterned wafer availability with one litho pass. Etch processes were scaled up from 300mm to 450mm for a 28nm pitch STI stack and a 40nm pitch M1 BEOL stack. The effects of various process parameters were investigated to fine tune each process. Overall process window has been checked and compared. Excellent process stability results were shown for current etch chambers.
Kristine German, Joel Kubby, Jingkuang Chen, James Diehl, Kathleen Feinberg, Peter Gulvin, Larry Herko, Nancy Jia, Pinyen Lin, Xueyuan Liu, Jun Ma, John Meyers, Peter Nystrom, Yao Rong Wang
Xerox Corporation has developed a technology platform for on-chip integration of latching MEMS optical waveguide switches and Planar Light Circuit (PLC) components using a Silicon On Insulator (SOI) based process. To illustrate the current state of this new technology platform, working prototypes of a Reconfigurable Optical Add/Drop Multiplexer (ROADM) and a l-router will be presented along with details of the integrated latching MEMS optical switches. On-chip integration of optical switches and PLCs can greatly reduce the size, manufacturing cost and operating cost of multi-component optical equipment. It is anticipated that low-cost, low-overhead optical network products will accelerate the migration of functions and services from high-cost long-haul markets to price sensitive markets, including networks for metropolitan areas and fiber to the home. Compared to the more common silica-on-silicon PLC technology, the high index of refraction of silicon waveguides created in the SOI device layer enables miniaturization of optical components, thereby increasing yield and decreasing cost projections. The latching SOI MEMS switches feature moving waveguides, and are advantaged across multiple attributes relative to alternative switching technologies, such as thermal optical switches and polymer switches. The SOI process employed was jointly developed under the auspice of the NIST APT program in partnership with Coventor, Corning IntelliSense Corp., and MicroScan Systems to enable fabrication of a broad range of free space and guided wave MicroOptoElectroMechanical Systems (MOEMS).
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