Dr. Puneet Gupta
at UCLA Samueli School Of Engg
SPIE Involvement:
Author | Instructor
Publications (42)

Proceedings Article | 9 March 2020 Presentation
Proc. SPIE. 11299, AI and Optical Data Sciences
KEYWORDS: Optical filters, Electronics, Spatial filters, Image processing, Data processing, Neural networks, Computer networks, Convolution, Digital micromirror devices, Optical computing

Proceedings Article | 9 October 2018 Paper
Proc. SPIE. 10809, International Conference on Extreme Ultraviolet Lithography 2018
KEYWORDS: Lithography, Safety, Metals, Computer programming, Photomasks, Extreme ultraviolet, Extreme ultraviolet lithography, Semiconducting wafers, Yield improvement, 193nm lithography

Proceedings Article | 20 March 2018 Paper
Proc. SPIE. 10588, Design-Process-Technology Co-optimization for Manufacturability XII
KEYWORDS: Optical lithography, Metals, Dielectrics, Electrons, Photoresist materials, Very large scale integration, Extreme ultraviolet, Extreme ultraviolet lithography, Line edge roughness, Stochastic processes

Proceedings Article | 26 February 2018 Presentation + Paper
Proc. SPIE. 10523, Laser 3D Manufacturing V
KEYWORDS: Error analysis, Computer programming, 3D modeling, 3D printing, Additive manufacturing, Printing, Solids, Computer aided design, Stereolithography, Solid modeling

SPIE Journal Paper | 28 March 2017
JM3 Vol. 16 Issue 01
KEYWORDS: Photomasks, Extreme ultraviolet, Lithography, Legal, Electron beam lithography, Germanium, Surface plasmons, Optical lithography, Double patterning technology, Directed self assembly

Showing 5 of 42 publications
Course Instructor
SC1101: Understanding Design-Patterning Interactions
This course explains how layout and circuit design interact with lithography choices. We especially focus on multi-patterning technologies such as LELE double patterning and SADP. We will explore role of design in lithography technology development as well as in lithographic process control. We will further discuss design enablement of multi-patterning technologies, especially in context of cell-based digital designs.
SC1187: Understanding Design-Patterning Interactions for EUV and DSA
EUV lithography and DSA haven been accepted by the industry as most promising candidates for dimensional scaling enablement at N7 technology node and beyond. This tutorial explains how introduction of such lithography technologies going to impact layout and circuit design. Choices of lithography would impact physical design and have a significant impact at system level. This tutorial will focus on transition from 193i multi-patterning technologies to EUV lithography and DSA. Factors that would determine on the enablement of these technologies would be highlighted and possible solutions would be shared.
SC708: Impact Of Variability On VLSI Circuits
Sub-90nm CMOS technologies are giving rise to significant variation in physical parameters of VLSI designs which has adverse impact on their electrical behavior. Most manufacturing-oriented professionals are familiar with the variations in physical parameters. This course will provide attendees with knowledge of how these physical variations impact the circuit operations, i.e., their electrical behavior. The impact on timing as well as power will be discussed. We will describe relative impact of these variations on various circuit families as well as circuit design techniques to mitigate the impact of manufacturing variations. Due to the large mangnitude of these variations, it is clear that designing for worst case behavior leaves significant performance on the table. We will discuss how systematic variation can be exploited in the current static timing methodology if it is known. A statistical timing and design methodology will also be discussed that can help regain some of this performance. With an eye towards the future, we will also explore manufacturing aware design closure. The course will be illustrated with practical examples throughout.
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