Proc. SPIE. 9045, 2013 International Conference on Optical Instruments and Technology: Optoelectronic Imaging and Processing Technology
KEYWORDS: Digital signal processing, Image processing, Inspection, Field programmable gate arrays, Image sensors, Signal processing, Image transmission, Image storage, Data conversion, Algorithm development
In high-speed banknote sorting system, to real-time deal with massive data and complex algorithm is required. This paper proposes an embedded processing system, which realizing the high-speed image acquisition and real-time processing of banknote image. The system is a customized and flexible architecture consisting of one large scale FPGA and four high performance DSP chips. The five processors have good communication with each other by RapidIO BUS. After evaluating the system-calculating overhead, the data throughput, and the hardware characteristics, we presents the whole processing program systematically running in FPGA and DSPs. In order to make full use of the advantage of FPGA highly parallelism and DSP deeply pipeline, the FPGA is designed for running parallel algorithms with large amount of calculation but low complexity of control flow, and the rest of algorithms are assigned to the four DSPs relatively. Finally, the whole program of image processing at the speed of 40 frames per second is realized on the embedded processing platform. The system has been successfully used in high-speed banknote sorting device, which has showed stable and reliable properties. And it also has excellent performance in processing ability with the verification of large scale operation.
Non-standard video acquisition is a common requirement in science research, industrial detection and medical
instrument. A general analog video signal acquisition scheme using TI DSP video port cooperates with video ADC
AD9985 is proposed in this paper. FPGA is used to package AD9985 output data into 16bit width and decrease half of
pixel clock frequency, in order to resolve video port bandwidth bottleneck problem. The experiments show that the
system can capture a variety of analog video formats, including non-standard video and standard video signals.
Resolution of captured video can be up to 2048×2048 in case of frame rate under 30fps, and the captured frame rate can
reach up to 400fps in case of resolution under 640×480. The image quality obtained is quite well, and system parameters
can be adjusted conveniently.
MWIR and LWIR are normally used in night vision system. A pseudo-color dual-band infrared image fusion algorithm is
proposed in this paper based on image features in wavelet domain. After wavelet decomposed from source images, edge
features are extracted from each low frequency component. The fusion rules are defined by the edge information, using
local modulus maxima rule for edge pixels and its sub-band neighboring pixels, and weighted mean coefficient rule for
non-edge pixels. Fusion result is mapped into pseudo-color image using special color look-up table in YUV color space.
The embedded fusion system used in night vision system is designed by TI multi-media processor DM642, and the
algorithm is validated on this platform. The experiments show that fusion result has good visual effect, and also has good
performance on the objective evaluation and anti-noise ability.