This paper presents an energy efficient VLSI architecture for motion estimation using image processing assisted voltage
overscaling (VOS). Motion estimation is the most computationally expensive block inside any video encoder, typically
consuming 40-60% of the total power. This work focuses on using VOS to reduce power consumption at the expense of
marginal loss of visual quality. Some image processing techniques are used to assist VOS so that a better trade-off
between power and visual quality can be achieved. The design is demonstrated using full search and three step search
algorithms. Simulation results in 65nm CMOS technology show that the proposed technique can save up to 30% power
at the cost of 0.5dB loss of PSNR.