An analytical model for a gate all around (GAA) Tunnel Field Effect Transistor (TFET) having circular and square
cross section geometry has been proposed in this work describing the important device electrostatic parameters i.e.
Surface Potential, Electric Field and Energy Band profile. Further, the model is extended for both a p-i-n and p-n-p-n
architecture keeping in view the advantages offered by a p-n-p-n architecture (also known as tunnel source or halo doped
TFET) over a p-i-n based TFET. The results obtained from the model have been validated with results obtained through
Silvaco ATLAS 3D device simulation software.