The incident surface power density in Massive Electron-beam Direct Write (MEBDW) during exposure is ~10<sup>5</sup> W/cm<sup>2</sup>, much higher than ~8 W/cm<sup>2</sup> ArF scanners and 2.4 W/cm<sup>2</sup> EUV. In addition, the wafer’s exposure in vacuum environment makes energy dissipation even harder. This thermal effect can cause mechanical distortion of the wafer during exposure and have has a direct influence on pattern placement error and image blur. In this paper, the thermo mechanical distortions caused by wafer heating for MEB system of different electron acceleration voltages have been simulated with finite element method (FEM). The global thermal effect affected by the friction force between the wafer and the wafer chuck as well as different thermal conductivities of the chuck material are simulated. Furthermore, the thermal effects of different lithography systems such as EUV scanners and conventional optical scanners are compared. The thermal effects of MEBDW systems are shown to be acceptable.
Massively E-beam maskless lithography (MEBML2) is one of the potential solutions for 32-nm half-pitch and
beyond. In the past, its relatively low throughput restricted EBDW development to mostly mask making, small volume
wafer production and prototyping. Recently the production worthy ML2 approaches, >10,000 e-beams writing in
parallel, have been proposed by MAPPER, KLA and IMS. These approaches use raster scan in pattern writing. Hence
the bitmap is certainly the final data format.
The bitmap format used to have huge data volume with fine pixel size to maintain the CD accuracy after electron
proximity correction (EPC). Data handling becomes necessary, especially on data transmission rate. The aggregated data
transmission rate would be up to 1963 Tera bits per second (bps) for a 10 WPH tool using 1-nm pixel size and 1-bit gray
level. It needs 19,630 fibers each transmitting 10 Gbps. The data rate per beam would be >20 Gbps in 10,000-beam
MEBML2. Hence data reduction using bigger pixel size to achieve sub-nm EPC accuracy is crucial for reducing the fiber
number to the beam number.
In this paper, the writing-error-enhanced-factor to quantitatively characterize the impact of CD accuracy by various
total blur in resist is reported; and we propose the vernier pattern to verify sub-nm CD accuracy and the in-house
dithering raster method to achieve sub-0.2-nm CD accuracy using multiple-nm pixel sizes, which could reduce the need
of the aggregated data rate to 11%, 33%, 44% and 79% of 1963 Tbps on 22-nm, 16-nm, 11-nm, 8-nm node respectively.