Graphene nanoscrolls (GNSs) as a new category of quasi one dimensional belong to the carbon-based nanomaterials, which have recently captivated the attention of researchers. The latest discoveries of exceptional structural and electronic properties of GNSs like, high mobility, controllable band gap and tunable core size has become a new stimuli for nanotechnology researchers. Fundamental descriptions about structure and electronic properties of GNSs have been investigated in order to apply them in nanoelectronic applications like nanotransistors and nanosensors as a new semiconducting material. By utilizing a novel approach, the analytical conductance model (G) of GNSs with the effect of Hall quantum is derived. This letter introduces a geometrydependent model to analyze the conductance of GNSs. The conductance modeling of GNS in parabolic part of the band structure which displays minimum conductance near the charge neutrality point is calculated. Subsequently, the effect of temperature and physical parameters on GNS conductivity is studied. This study emphasized that the GNS is a promising candidate for new generation of nanoelectronic devices.
Interconnect wires are major technology components of modern high-speed integrated circuits. To overcome the
latter's degradation caused by increasing miniaturization, there is an urgent need to look for alternative technologies.
Since carbon based materials generate promising results, this paper focuses on describing the electrical properties of
carbon based materials, in particular the use of graphene nanoribbon (GNR) as well as trilayer graphene nanoribbon
(TGN) as next generation interconnects: since the conductance of TGN is less affected by external fields compared to
GNR, it forms an improved choice for on-chip interconnects. The conductance model of TGN is derived and
discussed in detail.
Enhanced symmetrical self-aligned double-gate (DG) vertical nMOSFET with low parasitic capacitance is presented.
The process utilizes the oblique rotating ion implantation (ORI) method combined with fillet local oxidation (FILOX)
technology (FILOX + ORI). Self-aligned region forms a sharp vertical channel profile that increased the number of
electrons in the channel. These have improved drive-on current and drain-induced-barrier-lowering (DIBL) effect with a
reduced off-state leakage current tremendously. The gate-to-drain capacitance is significantly reduced while having a
small difference of gate-to-source capacitance compared to FILOX device. The drain overlap capacitance is a factor of
0.2 lower and the source overlap capacitance is a factor of 1.5 lower than standard vertical MOSFETs.