PROCEEDINGS ARTICLE | April 24, 2003
Proc. SPIE. 5116, Smart Sensors, Actuators, and MEMS
KEYWORDS: Oxides, Etching, Annealing, Silicon, Surface roughness, Silicon films, Plasma enhanced chemical vapor deposition, Semiconducting wafers, Wafer bonding, Chemical mechanical planarization
The effects of various deposition and annealing conditions of Plasma Enhanced Chemical Vapour Deposited (PECVD) oxide films on residual stress, optical index, BHF etch rate, surface roughness for thick PECVD oxide films are investigated. Rapid Thermal Annealing (RTA) and annealing in regular furnaces are both considered and compared. AFM measurements were required to measure the oxide surface roughness. Thick PECVD oxide films of 1.5 μm were deposited on 380 μm bulk silicon wafer. Starting from a conventional recipe the power, the [N2O/SiH4] ratio and the total gas flow were successively varied. An increase of the total gas flow or/and a decrease of power lead to an increase of the BHF etch rate and surface roughness but on the other hand decrease the residual stress. A high ratio N2O/SiH4 yields to oxide with low BHF etch rate but characterized by higher residual stress. RTA reduces the stress and the BHF etch rate drastically and it is more efficient than conventional annealing in standard furnace. Actually, RTA reduces stress in a very short period of time (few seconds) compared to standard annealing, and then it does not contribute to doping diffusion of the already implanted regions of the wafer. From a compressive stress of about 80 MPa, RTA of 15 s leads to a residual stress of only 30 MPa and bring the BHF etch rate to acceptable values in the range of 2000 Α/min for high N2O/SiH4 ratio oxide. One main application of this RTA stress release of oxide is to provide processed wafers with a bow compatible(less than 10 μm) with Chemical Mechanical Polishing (CMP) or wafer bonding.
