Time-to-digital converters (TDCs) and time correlated single photon counters (TCSPC) are instruments commonly used in LiDAR systems, quantum optics experiments and many other applications. This work presents a new time-to-digital converter architecture to improve dead time, converter linearity and precision. The priority encoder is a large combinatorial logic circuit and is often the bottleneck in field programmable gate array (FPGA) TDC designs, as the conversion must complete within the TDC’s clock period. This work utilizes a new dual clock domain architecture which has allowed for the TDC clock rate to increase by 38.1% from previous work and potentially double for more modern FPGA devices. This reduces the required delay line length and allows for more precise and linear converters as both integral non-linearity and measurement uncertainty scale according to the square root of the number of delay elements used in the delay line. Single shot precision has improved by 12.9% and converter differential non-linearity and integral non-linearity has reduced by 1.27 and 1.57 least significant bits respectively. This work demonstrates a significant improvement to the performance of FPGA based TDCs at the expense of using slightly more block random access memory.
In this paper, a novel Field Programmable Gate Array (FPGA) based instrument for Time Correlated Photon Counting (TCPC) is reported which takes advantage of the photon number resolving ability of newer single photon detectors technologies, such as silicon photomultipliers (SiPM). Utilizing the received photon number in the formation of the TCPC histogram will enable faster measurements in comparison to Time Correlated Single Photon Counting (TCSPC) as less information is being discarded per excitation pulse. The concept of (TCSPC) and the differences with TCPC are introduced, as the well as the advantages of using TCPC when using a number resolving photodetector such as a SiPM rather than a traditional Single Photon Avalanche Diode (SPAD). The design and performance of the system is reported. An 8-stop TCPC system is presented along with a hardware solution to handle time correlations in real-time on-chip rather than in post processing. A system accuracy of 42ps RMS has been demonstrated.
Time-to-digital converters are a key component in many photonics systems, ranging from LiDAR, quantum key distribution, quantum optics experiments and time correlated single photon counting applications. A novel efficient timeto- digital converter non-linearity calibration technique has been developed and demonstrated on a Spartan 6 LX150 field programmable gate array (FPGA). Most FPGA based time-to-digital converters either use post processing or have calibration techniques which do not focus on minimizing resource utilization. With the move towards imaging with arrays of single photon detectors, scalable timing instrumentation is required. The calibration system demonstrated minimizes block memory utilization, using the same memory for probability density function measurement and cumulative distribution function generation, creating a look up table which can be used to calibrate the sub-clock timing module of the time-to-digital converter. The system developed contains 16 time-to-digital converters and demonstrates an average accuracy of 21ps RMS (14.85ps single channel) with a resolution of 1.86ps.