We will discuss Advanced Micro Devices's (AMD) Fault Detection and Classification (FDC) program strategy and our six-step project template that we have identified that must be addressed for any successful FDC effort. We will discuss the recent development and implementation of a wafer-level FDC system on a TEL CLEAN TRAC ACT 8 photo track system in AMD's Fab25, a high volume microprocessor factory. We will present our approach to designing and implementing this FDC system and demonstrate its ability to automatically identify specific wafers within a lot that require manual review. Upon manual review, the decision can be made to rework the specific wafers or the lot.
This paper presents preliminary data on 300 nm wafer coatings by comparing photoresist coats on 150 nm, 200 mm and 300 mm wafers. Conventional methods of applying photoresist have ben prove effective on wafers with diameters up to 200 nm. How well 150 mm and 200 mm coating processes apply to 300 mm substrates is the focus of this paper. Spin speed versus photoresists thickness curves will be reviewed for all three wafer sizes.Additionally, two major coating uniformity factors, photoresist and cool plate temperature, will be studied for 200 mm and 300 mm wafers.
We present the first time resolved photon echo measurements of homogeneous dephasing of organic dopants in an inorganic sol-gel glass and compare these results with recent hole- burning experiments. In addition, energy transfer mechanisms and chromophore spatial distributions are investigated by time-resolved fluorescence anisotropy measurements.