In this work, we present the design of the technology and fabrication of TFTs with amorphous IGZO semiconductor and high-k gate dielectric layer in the form of hafnium oxide (HfOx). In the course of this work, the IGZO fabrication was optimized by means of Taguchi orthogonal tables approach in order to obtain an active semiconductor with reasonable high concentration of charge carriers, low roughness and relatively high mobility. The obtained Thin-Film Transistors can be characterized by very good electrical parameters, i.e., the effective mobility (μeff ≈ 12.8 cm2V-1s-1) significantly higher than that for a-Si TFTs (μeff ≈ 1 cm2V-1s-1). However, the value of sub-threshold swing (i.e., 640 mV/dec) points that the interfacial properties of IGZO/HfOx stack is characterized by high value of interface states density (Dit) which, in turn, demands further optimization for future applications of the demonstrated TFT structures.
In this work, we report the technology of infrared photodetectors based on graphene layers (GLs). In the course of this work the new set of photolithography masks was especially designed to fabricate test structures. The new masks-set contains a matrix of different types of photodetector structures with varied active area dimensions, as well as additional module for characterization of electro-physical parameters of graphene and graphene-based devices. After careful optimization of consecutive technological steps, test structures were fabricated. First results of electrical characterization of obtained graphene-based photodetectors demonstrated that the developed technology was successful, however, further detailed optical characterization towards sensing parameters and potential applications in infrared detectors is necessary.
In this work we present the investigations aimed at the optimization of the technology of Reactive Ion Etching in sulfur hexafluoride (SF6) plasma of silicon, which is necessary during fabrication of TFET according to the original concept of the device designed at Institute of Microelectronics and Optoelectronics (IMiO) of Warsaw University of Technology (WUT) laboratory. We have performed a two-stage optimization of RIE process’ parameters in order to obtain a controllable process characterized by good selectivity and anisotropy. Presented in this study findings have shown that the SF6 flow most significantly influence onto the RIE process’ results. Selected and optimized processing step will be used in the course of the fabrication of TFET devices, in future.