We present a model and a signal-processing algorithm for compensating the nonuniformity (NU) noise and surrounding temperature self-heating e ects on the response of uncooled microbolometer-based infrared cameras. The model for the NU noise considers pixelwise gain and o set parameters. The representation for the self-heating dynamics of the camera is an autoregressive moving average (ARMA) model for camera's internal temperature. The algorithm performs initially a two-point calibration at a known surrounding temperature. Next, without modifying the NU parameters, we dynamically compensate variations in the camera readout using both estimates of the ARMA model and measurements of the surrounding temperature taken by a simple sensor embedded in the camera. Tested on a CEDIP Jade UC33 camera, our system compensates reference black-body images at 30 degrees Celsius, with a peak error below 1.3 and a mean error below 0.3 degrees Celsius, in scenarios where the room temperature varied up to 14 degrees Celsius. Moreover, the regularity and simplicity of the algorithm enables us to implement it on embedded digital hardware, thereby reducing its cost, size, and power consumption. We implemented the algorithm on a Xilinx XC6SLX45 FPGA using xed-point arithmetic. The circuit exhibits an arithmetic error of 0.06 degrees compared to a software double-precision implementation. It compensates 320 × 240-pixel video at up to 1,437 fps and 640 × 480-pixel video at up to 360 fps, using 1% of the logic resources of the FPGA, and less than 1 mW of dynamic power at 110 MHz. Adding Gigabit Ethernet communication, HDMI display, and a pseudocolor map on the chip uses 10% of the resources and consumes 915 mW.
This paper presents a digital hardware filter that estimates the nonuniformity (NU) noise in an Infrared Focal Plane Array (IRFPA) and corrects it in real time. Implementing the algorithm in hardware results in a fast, compact, low-power nonuniformity correction (NUC) system that can be embedded into an intelligent imager at a very low cost. Because it does not use an external reference, our NUC circuit works in real time during normal operation, and can track parameter drift over time. Our NUC system models NU noise as a spatially regular source of additive noise, uses a Kalman filter to estimate the offset in each detector of the array and applies an inverse model to recover the original information captured by the detector. The NUC board uses a low-cost Xilinx Spartan 3E XC3S500E FPGA operating at 75MHz. The NUC circuit consumes 17.3mW of dynamic power and uses only 10% of the logic resources of the FPGA. Despite ignoring the multiplicative effects of nonuniformity, our NUC circuit reaches a Peak Signal-to-Noise Ratio (PSNR) of 35dB in under 50 frames, referenced to two-point calibration using black bodies. This performance lies within 0.35dB of a double-precision Matlab implementation of the algorithm. Without the bandwidth limitations currently imposed by the external RAM that stores the offset estimations, our circuit can correct 320x240-pixel video at up to 1,254 frames per second.