A System-in-Package (SiP) concept for the 3D-integration of a Single Wall Carbon Nanotube (SWCNT) resonator with its CMOS driving electronics is presented. The key element of this advanced SiP is the monolithic 3D-integration of the MEMS with the CMOS electronics using Through Silicon Vias (TSVs) on an SOI wafer. This SiP includes: A glass cap vacuum-sealed to the main wafer using an eutectic bonding process: a low leak rate of 2.7 10<sup>-9</sup> mbar•l/s was obtained; Platinum-TSVs, compatible with the SWCNT growth and release process; The TSVs were developed in a “via first” process and characterized at high-temperature — up to 850 °C. An ohmic contact between the Pt-metallization and the SOI silicon device layer was obtained; The driving CMOS electronic device is assembled to the MEMS using an Au stud bump technology. Keywords: System-in-Package (SiP), vacuum packaging, eutectic bonding, “via-first” TSVs, high-temperature platinum interconnects, ohmic contacts, Au-stud bumps assembly, CMOS electronics.