Sparrow, a low Size, Weight and Power (SWaP), high-end thermal imaging video core is presented, based on XBn- InAsSb Focal Plane Array (FPA) with 640×512 format and 10μm pitch, which is operated at 150K. The Sparrow video core offloads a range of functions from the host system, such as detector power supply, clocking and image processing, resulting in a very compact and low power module equipped with a miniature Split-Linear Stirling cooler. The Sparrow Module is optimized for a wide range of low SWaP applications, with a volume of 58×62×42 mm3, a weight of 300g, and typical power consumption of 5W at room temperature. It provides sub-frame video latency and supports a variety of output video formats and user-configurable advanced image processing algorithms.
Night Vision Imaging in the Short-Wave Infra-Red (SWIR) has some unique advantages over Visible, Near Infra-Red (NIR) or thermal imaging. It benefits from relatively high irradiance levels and intuitive reflective imaging. InGaAs/InP is the leading technology for two-dimensional (2D) SWIR detector arrays, utilizing low dark current, high efficiency and excellent uniformity. SCD's SWIR Imager is a low Size, Weight and Power (SWaP) video engine based on a low noise 640x512/15μm InGaAs Focal Plane Array (FPA) embedded in a low cost plastic package which includes a Thermo-Electric Cooler (TEC). The SWIR Imager dimensions are 31x31x32 mm3, it weighs 50 gram and has less than 1.4W Power consumption (excluding TEC). It supports conventional video formats, such as Camera Link and BT.656. The video engine image processing algorithms include Non-Uniformity Correction (NUC), Auto Exposure Control (AEC), Auto Gain Control (AGC), Dynamic Range Compression (DRC) and de-noising algorithms. The algorithms are specifically optimized for Low Light Level (LLL) conditions enabling imaging from sub mlux to 100 Klux light levels. In this work we will review the optimized video engine LLL architecture, electro-optical performance and the applicability to night vision systems.
The market demand for low SWaP (Size, Weight and Power) uncooled engines keeps growing. Low SWaP is especially
critical in battery-operated applications such as goggles and Thermal Weapon Sights. A new approach for the design of
the engines was implemented by SCD to optimize size and power consumption at system level.
The new approach described in the paper, consists of:
1. A modular hardware design that allows the user to define the exact level of integration needed for his system
2. An "open architecture" based on the OMAPTM530 DSP that allows the integrator to take advantage of unused
hardware (FPGA) and software (DSP) resources, for implementation of additional algorithms or functionality.
The approach was successfully implemented on the first generation of 25μm pitch BIRD detectors, and more recently on
the new, 640 x480, 17 μm pitch detector.
Proc. SPIE. 7834, Electro-Optical and Infrared Systems: Technology and Applications VII
KEYWORDS: Nonuniformity corrections, Infrared imaging, Digital signal processing, Detection and tracking algorithms, Sensors, Image processing, Video, Video processing, Analog electronics, Single crystal X-ray diffraction
SCD's new 17μm pitch VGA VOx μ-Bolometer detector was introduced in April 2010. Due to their overall size, weight
and power advantages, 17μm pitch uncooled detectors are currently being considered for next generation systems such
as thermal weapon sights (TWS), driver vision enhancers (DVE) and digitally fused goggles (DENVG). In this paper we
describe a new video engine developed at SCD to support the new 17μm pitch VGA detector. First, the modular design
concept of the hardware for the new video engine is described. This is followed by a description of the software design
concept, including features that emphasize the open architecture and the provision for a customer to add on his own
algorithms and software. The detector and the engine are on low rate production these days. Full production is planned
Over the last decade, SCD has developed and manufactured high quality InSb Focal Plane Arrays (FPAs), which are
currently used in many applications worldwide. SCD's production line includes many different types of InSb FPA with
formats of 320x256, 480x384 and 640x512 elements and with pitch sizes in the range of 15 to 30 μm. All these FPAs
are available in various packaging configurations, including fully integrated Detector-Dewar-Cooler Assemblies
(DDCA) with either closed-cycle Sterling or open-loop Joule-Thomson coolers.
With an increasing need for higher resolution, SCD has recently developed a new large format 2-D InSb detector with
1280x1024 elements and a pixel size of 15μm. The InSb 15μm pixel technology has already been proven at SCD with
the "Pelican" detector (640x512 elements), which was introduced at the Orlando conference in 2006.
A new signal processor was developed at SCD for use in this mega-pixel detector. This Readout Integrated Circuit
(ROIC) is designed for, and manufactured with, 0.18 μm CMOS technology. The migration from 0.5 to 0.18 μm CMOS
technology supports SCD's roadmap for the reduction of pixel size and power consumption and is in line with the
increasing demand for improved performance and on-chip functionality. Consequently, the new ROIC maintains the
same level of performance and functionality with a 15 μm pitch, as exists in our 20 μm-pitch ROICs based on 0.5μm
CMOS technology. Similar to Sebastian (SCD ROIC with A/D on chip), this signal processor also includes A/D
converters on the chip and demonstrates the same level of performance, but with reduced power consumption. The pixel
readout rate has been increased up to 160 MHz in order to support a high frame rate, resulting in 120 Hz operation with
a window of 1024×1024 elements at ~130 mW. These A/D converters on chip save the need for using 16 A/D channels
on board (in the case of an analog ROIC) which would operate at 10 MHz and consume about 8Watts
A Dewar has been designed with a stiffened detector support to withstand harsh environmental conditions with a
minimal contribution to the heat load of the detector. The combination of the 0.18μm-based low power CMOS
technology for the ROIC and the stiffening of the detector support within the Dewar has enabled the use of the Ricor
K508 cryo-cooler (0.5 W). This has created a high-resolution detector in a very compact package.
In this paper we present the basic concept of the new detector. We will describe its construction and will present
electrical and radiometric characterization results.