A monolithic crystalline Si photovoltaic device, developing a potential of 2,120 Volts, has been demonstrated<sup>12</sup>. The monolithic device consists of 3600 small photovoltaic cells connected in series and fabricated using standard CMOS processing on SOI wafers. The SOI wafers with trenches etched to the buried oxide (BOX) depth are used for cell isolation. The photovoltaic cell is a Si pn junction device with the n surface region forming the front surface diffused region upon which light impinges. Contact is formed to the deeper diffused region at the cell edge. The p+ deep-diffused region forms the contact to the p-type base region. Base regions were 5 or 10 μm thick. Series connection of individual cells is accomplished using standard CMOS interconnects. This allows for the voltage to range from approximately 0.5 Volts for a single cell to above a thousand volts for strings of thousands of cells. The current is determined by cell area. The voltage is limited by dielectric breakdown. Each cell is isolated from the adjacent cells through dielectric-filled trench isolation, the substrate through the SOI buried oxide, and the metal wiring by the deposited pre-metal dielectric. If any of these dielectrics fail (whether due to high electric fields or inherent defects), the photovoltaic device will not produce the desired potential. We have used ultra-thick buried oxide SOI and several novel processes, including an oxynitride trench fill process, to avoid dielectric breakdown.
This report describes the features of monolithic, series connected silicon (Si) photovoltaic (PV) cells which have been developed for applications requiring higher voltages than obtained with conventional single junction solar cells. These devices are intended to play a significant role in micro / mini firing systems and fuzing systems for DOE and DOD applications. They are also appropriate for other applications (such as micro-electro-mechanical-systems (MEMS) actuation as demonstrated by Bellew et. al.) where electric power is required in remote regions and electrical connection to the region is unavailable or deemed detrimental for whatever reason. Our monolithic device consists of a large number of small PV cells, combined in series and fabricated using standard CMOS processing on silicon-on-insulator (SOI) wafers with 0.4 to 3 micron thick buried oxide (BOX) and top Si thickness of 5 and 10 microns. Individual cell isolation is achieved using the BOX layer of the SOI wafer on the bottom. Isolation along the sides is produced by trenching the top Si and subsequently filling the trench by deposition of dielectric films such as oxide, silicon nitride, or oxynitride. Multiple electrically isolated PV cells are connected in series to produce voltages ranging from approximately 0.5 volts for a single cell to several thousands of volts for strings of thousands of cells.