Ultrathin HfTaOx gate dielectric has been deposited on Si0.81Ge0.19 by RF co-sputtering of HfO2 and Ta2O5 targets. X-ray
photoelectron spectroscopic (XPS) analyses indicate an interfacial layer containing GeOx, Hf silicate, SiOx (layer of Hf-
Si-Ge-O) formation during deposition of HfTaOx. No evidence of Ta-silicate or Ta incorporation was found at the
interface. X-ray diffraction (GIXRD) measurements show that as-deposited HfTaOx films are amorphous; however, the
crystallization temperature of HfTaOx film is found to increase significantly after annealing beyond 500 °C (for 5 min)
along with the incorporation of Ta (with 18% Ta). It has been found that HfTaOx gate dielectric on Si0.81Ge0.19 exhibit
excellent electrical properties with low interface state density (~6.0×1011 cm-2eV-1) and hysteresis voltage (<70 mV).
Charge trapping/detrapping behavior of the gate stacks has been studied under constant voltage stressing and the
degradation mechanism of the dielectrics has been studied in detail.
Ultra-thin HfO2 high-k gate dielectric has been deposited directly on strained Si0.81Ge0.19 by atomic layer deposition
(ALD). The effects of metal gate electrodes (Au, Pd and Pt) on dielectric properties and charge trapping behavior of
metal-insulator-semiconductor (MIS) capacitors are investigated. Grazing incidence X-ray diffraction (GIXRD) analysis
shows that the conversion from amorphous to crystalline phase start to appear in the HfO2 films when annealed between
400-500°C. The measured ΔVfband hysteresis in high frequency C-V characteristics are used to study the pre-existing
traps in the dielectric. Low-frequency noise characteristics have been measured using MIS capacitors with contact area ~
2×10-3 cm2. The power spectral densities (PSD) of the MIS capacitors with metal gate electrodes are compared and their
bias dependencies are reported. While a two level random telegraph signal (RTS) is observed at low voltage, multilevel
RTS is observed at higher bias voltages.