Dr. Scott Mansfield
Engineer at IBM Thomas J Watson Research Ctr
SPIE Involvement:
Author | Instructor
Publications (33)

Proceedings Article | 31 March 2014 Paper
Proc. SPIE. 9052, Optical Microlithography XXVII
KEYWORDS: Metrology, Data modeling, Calibration, Manufacturing, 3D modeling, Photomasks, Source mask optimization, Semiconducting wafers, Tolerancing, Performance modeling

Proceedings Article | 23 March 2011 Paper
Proc. SPIE. 7973, Optical Microlithography XXIV
KEYWORDS: Lithography, Optical lithography, Image processing, Photomasks, Source mask optimization, Optical proximity correction, SRAF, Semiconducting wafers, Tolerancing, Resolution enhancement technologies

Proceedings Article | 4 March 2010 Paper
Proc. SPIE. 7640, Optical Microlithography XXIII
KEYWORDS: Lithography, Optical lithography, Data modeling, Opacity, Glasses, 3D modeling, Finite element methods, Photomasks, SRAF, Binary data

Proceedings Article | 16 March 2009 Paper
Proc. SPIE. 7274, Optical Microlithography XXII
KEYWORDS: Lithography, Calibration, Etching, Photomasks, Optical proximity correction, Critical dimension metrology, Reactive ion etching, Photoresist processing, Semiconducting wafers, Process modeling

Proceedings Article | 16 March 2009 Paper
Proc. SPIE. 7274, Optical Microlithography XXII
KEYWORDS: Lithography, Logic, Optical lithography, Etching, Metals, Printing, Photomasks, Double patterning technology, Tolerancing, Resolution enhancement technologies

Showing 5 of 33 publications
Course Instructor
SC856: Computational Lithography
Computational Lithography (CL) has proven to be an enabling technology, not only in Optical Proximity Correction and Verification, but in the specification of design rules and the development of new Resolution Enhancement Techniques (RET). This course will cover a broad spectrum of the field of CL; from the need for simulation, to its use in RET development and Design for Manufacturability (DfM), to recent advances in modeling techniques. The course material assumes a basic understanding of lithography processes and methods to characterize those processes, and will focus primarily on applications of CL. RET development will be discussed with an emphasis on double patterning. Future challenges in predictive modeling, along with the special challenges of modeling for DfM applications, will also be presented.
SC834: Lithography Friendly Design and Beyond - A Broader Review of DfM
As the microelectronic industry’s need for dimensional scaling continues to outpace the availability of patterning systems with sufficient resolving power, resolution enhancement techniques (RET) of ever increasing complexity are becoming commonplace. The most severely resolution challenged products competing at the leading edge of the technology roadmap, are relying on lithography friendly designs as a key component of their design for manufacturability (DfM) strategy. This course will explain lithography resolution limits, basic concepts of RET and their layout impact, and optimization techniques for high resolution lithography. The increasing importance of lithography friendly design, however, does not alleviate the need for other DfM techniques addressing random and systematic failure mechanism such as critical area analysis (CAA), layout redundancy, or chemical mechanical polishing (CMP) aware layout optimization. This course will review a variety of process characterization techniques and their uses in DfM. Combining distinctly different DfM techniques into a cohesive optimization solution and then integrating this solution into existing design flows presents its own set of challenges. By reviewing the basic elements of common design flows and exploring how emerging and established DfM solutions affect such flows, this course will convey a broad system level view of an integrated DfM approach.
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