Dr. Sergei V. Postnikov Profile

Dr. Sergei V. Postnikov

Process Engineer at ASELTA Nanographics

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Author

Publications (27)

Proceedings Article | 19 September 2018 Paper

Curvilinear data processing methods and verification

Clyde Browning, Serguei Postnikov, Matthieu Milléquant, Sébastien Bayle, Patrick Schiavone

Proceedings Volume 10775, 107750K (2018) https://doi.org/10.1117/12.2326599

KEYWORDS: Tolerancing, Data processing, Lithography, Manufacturing, Photomasks, Data modeling, Optical proximity correction, Photoresist processing, Silicon

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Designs for photonic devices on silicon relies on non-Manhattan features such as curves and a wide variety of angles. Reticle Enhancement Techniques (RET) that are commonly used for CMOS manufacturing now are applied to curvilinear data patterns for the same reasons of enhancing pattern fidelity. Common techniques for curvilinear data processing include Manhattanization, jog removal, and jog alignment. We propose a novel method of describing curvilinear shapes in terms of curves reconstructed between control points. Such representation of curvilinear shapes brings many benefits in terms of pattern description (improved fidelity, file compaction), correction and verification. For example, it allows smooth displacements during the design correction procedure for process effects. The conventional correction by biasing each fragment illustrates the curve-based biasing where only the control points have been moved and the corrected shape was then reconstructed by connecting the control points in their new positions by the new curves. This method results in faster computation because there are fewer locations to adjust geometry, easier convergence and intrinsic continuity between edges. It also affords significant reduction of the design file size. Besides processing curvilinear pattern data, verification is also required after any original pattern modifications. Mask Rule Checks (MRC) are considered as standard step in any design data preparation flows, but the conventional MRC algorithms are conceived for Manhattan designs and as such they often result in numerous false errors or even missing errors when applied to photonics or ILT (Inverse Lithography Technology) designs. In addition, MRC for photonic layouts require much more than basic width and space checking. We developed a verification technology compliant with curvilinear layouts. The new MRC technique is also based on curve representation of the original design comparing directly the curves instead of the straight fragments. It permits to have only one error flag per curve instead of multiple errors seen in fragment-by-fragment MRC.

Proceedings Article | 12 June 2018 Paper

Demonstration of an effective mask proximity correction for advanced photomask

Kenji Kono, Yasuo Kon, Yasunari Tsukino, Sergei Postnikov, Thiago Figueiro, Luc Martin, Paolo Petroni, Patrick Schiavone

Proceedings Volume 10807, 108070A (2018) https://doi.org/10.1117/12.2501785

KEYWORDS: Calibration, Photomasks, Metals, Model-based design, Manufacturing, Etching, Metrology, Critical dimension metrology, Scanning electron microscopy, Electron beam lithography

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Proceedings Article | 13 July 2017 Paper

Data preparation in the age of curvilinear patterns

Sébastien Bayle, Charles Tiphine, Matthieu Milléquant, Thiago Figueiro, Luc Martin, Sergei Postnikov, Patrick Schiavone

Proceedings Volume 10454, 104540H (2017) https://doi.org/10.1117/12.2280704

KEYWORDS: Photomasks, Lithography, Model-based design, Optical lithography, Photonics, Algorithm development, Semiconductors, Silicon photonics, Databases, Optical proximity correction

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Proceedings Article | 22 March 2016 Paper

Complete data preparation flow for Massively Parallel E-Beam lithography on 28nm node full-field design

Aurélien Fay, Clyde Browning, Pieter Brandt, Jacky Chartoire, Sébastien Bérard-Bergery, Jérôme Hazart, Alexandre Chagoya, Sergei Postnikov, Mohamed Saib, Ludovic Lattard, Patrick Schavione

Proceedings Volume 9777, 977714 (2016) https://doi.org/10.1117/12.2219178

KEYWORDS: Electron beam lithography, Lithography, Optical lithography, Photoresist processing, Software development, Semiconducting wafers, Optical simulations, Electronic design automation, Data modeling, Metrology, Point spread functions, Electroluminescence, Logic, Critical dimension metrology, Calibration, Manufacturing

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Massively parallel mask-less electron beam lithography (MP-EBL) offers a large intrinsic flexibility at a low cost of ownership in comparison to conventional optical lithography tools. This attractive direct-write technique needs a dedicated data preparation flow to correct both electronic and resist processes. Moreover, Data Prep has to be completed in a short enough time to preserve the flexibility advantage of MP-EBL. While the MP-EBL tools have currently entered an advanced stage of development, this paper will focus on the data preparation side of the work for specifically the MAPPER Lithography FLX-1200 tool [1]-[4], using the ASELTA Nanographics Inscale software. The complete flow as well as the methodology used to achieve a full-field layout data preparation, within an acceptable cycle time, will be presented. Layout used for Data Prep evaluation was one of a 28 nm technology node Metal1 chip with a field size of 26x33mm², compatible with typical stepper/scanner field sizes and wafer stepping plans. Proximity Effect Correction (PEC) was applied to the entire field, which was then exported as a single file to MAPPER Lithography’s machine format, containing fractured shapes and dose assignments. The Soft Edge beam to beam stitching method was employed in the specific overlap regions defined by the machine format as well. In addition to PEC, verification of the correction was included as part of the overall data preparation cycle time. This verification step was executed on the machine file format to ensure pattern fidelity and accuracy as late in the flow as possible. Verification over the full chip, involving billions of evaluation points, is performed both at nominal conditions and at Process Window corners in order to ensure proper exposure and process latitude. The complete MP-EBL data preparation flow was demonstrated for a 28 nm node Metal1 layout in 37 hours. The final verification step shows that the Edge Placement Error (EPE) is kept below 2.25 nm over an exposure dose variation of 8%.

Proceedings Article | 15 March 2016 Paper

OPC for curved designs in application to photonics on silicon

Bastien Orlando, Vincent Farys, Loïc Schneider, Sébastien Cremer, Sergei Postnikov, Matthieu Millequant, Mathieu Dirrenberger, Charles Tiphine, Sébastian Bayle, Céline Tranquillin, Patrick Schiavone

Proceedings Volume 9780, 97801U (2016) https://doi.org/10.1117/12.2230400

KEYWORDS: Photonics, Resolution enhancement technologies, Optical proximity correction, SRAF, Scanning electron microscopy, Silicon, Silicon photonics, Waveguides, Photonic devices, Lithography

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Proceedings Article | 12 April 2013 Paper

Model-based stitching and inter-mask bridge prevention for double patterning lithography

Guillaume Landié, Jean-Noel Pena, Serguey Postnikov, James Word, Shumay Shang, Fahd Chaoui, Emek Yesilada, Catherine Martinelli

Proceedings Volume 8683, 868316 (2013) https://doi.org/10.1117/12.2011494

KEYWORDS: Optical proximity correction, Photomasks, Double patterning technology, Bridges, Lithography, Etching, Metals, Visualization, Manufacturing, Optical lithography

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Proceedings Article | 13 March 2012 Paper

RET and DFM techniques for sub 30nm

E. Yesilada, J. Entradas, C. Gardin, J. N. Pena, A. Villaret, V. Farys, C. Beylier, F. Robert, S. Postnikov, A. M. Armeanu, C. Moyroud, F. Chaoui, F. Bernard Granger, O. Toublan

Proceedings Volume 8326, 83262H (2012) https://doi.org/10.1117/12.915825

KEYWORDS: Optical proximity correction, SRAF, Lithography, Resolution enhancement technologies, Design for manufacturing, Photomasks, Computational lithography, Inspection, Manufacturing, Optical lithography

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Proceedings Article | 4 December 2008 Paper

A methodology for double patterning compliant split and design

Vincent Wiaux, Staf Verhaegen, Fumio Iwamoto, Mireille Maenhoudt, Takashi Matsuda, Sergei Postnikov, Geert Vandenberghe

Proceedings Volume 7140, 71401X (2008) https://doi.org/10.1117/12.804697

KEYWORDS: Double patterning technology, Optical lithography, Optical proximity correction, Logic, Metals, Photomasks, Etching, Failure analysis, Resolution enhancement technologies, Critical dimension metrology

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Proceedings Article | 1 April 2008 Paper

Split and design guidelines for double patterning

Vincent Wiaux, Staf Verhaegen, Shaunee Cheng, Fumio Iwamoto, Patrick Jaenen, Mireille Maenhoudt, Takashi Matsuda, Sergei Postnikov, Geert Vandenberghe

Proceedings Volume 6924, 692409 (2008) https://doi.org/10.1117/12.774104

KEYWORDS: Double patterning technology, Optical lithography, Logic, Optical proximity correction, Photomasks, Metals, Etching, Failure analysis, Immersion lithography, Image resolution

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Proceedings Article | 30 March 2007 Paper

Screening of second-generation high-index liquids

Eric Hendrickx, Sergei Postnikov, Philippe Foubert, Roel Gronheid, ByeongSoo Kim

Proceedings Volume 6519, 65190A (2007) https://doi.org/10.1117/12.713110

KEYWORDS: Liquids, Semiconducting wafers, Water, Photoresist materials, Silicon, Electroluminescence, Refractive index, Scanners, Scatterometry, Interferometers

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Proceedings Article | 12 May 2005 Paper

Assessment of complementary double dipole lithography for 45nm and 32nm technologies

Sergei Postnikov, Emilien Robert, Philippe Thony, Kyle Patterson, Scott Warrick, Daniel Henry, Andres Torres, Olivier Toublan

Proceedings Volume 5754, (2005) https://doi.org/10.1117/12.601756

KEYWORDS: Photomasks, Lithography, Monte Carlo methods, Critical dimension metrology, Optical proximity correction, Polarization, Lithographic illumination, Optical lithography, SRAF, Nanoimprint lithography

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Proceedings Article | 12 May 2005 Paper

Strategies of optical proximity correction dedicated to chromeless phase lithography for 65 and 45 nm node

Emilien Robert, Philippe Thony, Kevin Lucas, Daniel Henry, Bryan Kasprowicz, Sergei Postnikov, Will Conley, Wei Wu, Lloyd Litt

Proceedings Volume 5754, (2005) https://doi.org/10.1117/12.601743

KEYWORDS: Chromium, Photomasks, Scattering, Semiconducting wafers, Optical proximity correction, Lithography, Phase shifts, Scanners, Diffraction, Etching

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Proceedings Article | 28 May 2004 Paper

Evaluation of the critical dimension control requirements in the ITRS using statistical simulation and error budgets

Scott Hector, Sergei Postnikov, Jonathan Cobb

Proceedings Volume 5377, (2004) https://doi.org/10.1117/12.537107

KEYWORDS: Critical dimension metrology, Photomasks, Extreme ultraviolet, Error analysis, Monte Carlo methods, Semiconducting wafers, Lithography, SRAF, Statistical analysis, Extreme ultraviolet lithography

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Proceedings Article | 28 May 2004 Paper

MEV as a new constraint for lithographers in the sub-100-nm regime

Yorick Trouiller, Sergei Postnikov, Kevin Lucas, Frank Sundermann, Kyle Patterson, Jerome Belledent, Christophe Couderc, Yves Rody

Proceedings Volume 5377, (2004) https://doi.org/10.1117/12.556617

KEYWORDS: Electroluminescence, Critical dimension metrology, Photomasks, Semiconducting wafers, Lithography, Cadmium, Logic devices, Process control, Sodium, SRAF

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Proceedings Article | 20 May 2004 Paper

Process latitude measurements and their implications for CD control in EUV lithography

Jonathan Cobb, Richard Peters, Sergei Postnikov, Scott Hector, Bing Lu, Eric Weisbrod, James Wasson, Pawitter Mangat, Donna O'Connell

Proceedings Volume 5374, (2004) https://doi.org/10.1117/12.537366

KEYWORDS: Extreme ultraviolet lithography, Semiconducting wafers, Optical proximity correction, Lithography, Photomasks, Critical dimension metrology, Data modeling, Monte Carlo methods, Scanners, Scanning electron microscopy

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Proceedings Article | 10 July 2003 Paper

Investigation of product design weaknesses using model-based OPC sensitivity analysis

Sergei Postnikov, Kevin Lucas, Cesar Garza, Karl Wimmer, Patrick LaCour, James Word

Proceedings Volume 5042, (2003) https://doi.org/10.1117/12.485263

KEYWORDS: Optical proximity correction, Reticles, Error analysis, Semiconducting wafers, Model-based design, Optical lithography, Product engineering, Data modeling, Atrial fibrillation, Lithography

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Proceedings Article | 26 June 2003 Paper

Process, design, and optical proximity correction requirements for the 65nm device generation

Kevin Lucas, Patrick Montgomery, Lloyd Litt, Will Conley, Sergei Postnikov, Wei Wu, Chi-Min Yuan, Marc Olivares, Kirk Strozewski, Russell Carter, James Vasek, David Smith, Eric Fanucchi, Vincent Wiaux, Geert Vandenberghe, Olivier Toublan, Arjan Verhappen, Jan Kuijten, Johannes van Wingerden, Bryan Kasprowicz, Jeffrey Tracy, Christopher Progler, Eugene Shiro, Igor Topouzov, Karl Wimmer, Bernard Roman

Proceedings Volume 5040, (2003) https://doi.org/10.1117/12.485498

KEYWORDS: Reticles, Optical lithography, Optical proximity correction, Lithography, 193nm lithography, Scanners, Logic, Optical design, Lithographic illumination, SRAF

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Proceedings Article | 12 June 2003 Paper

Fabrication of integrated circuits with high yield using ultrathin resist processes

Richard Peters, Sergei Postnikov, Jonathan Cobb, S. Dakshina-Murthy, Tab Stephens, Colita Parker, Eric Luckowski, Arturo Martinez, Wei Wu, Scott Hector

Proceedings Volume 5039, (2003) https://doi.org/10.1117/12.485122

KEYWORDS: Photoresist processing, Transistors, Etching, Semiconducting wafers, Plasma etching, Plasma, Silicon, Resistance, Defect inspection, Optical lithography

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Proceedings Article | 30 July 2002 Paper

Model-based design improvements for the 100-nm lithography generation

Kevin Lucas, Sergei Postnikov, Kyle Patterson, Chi-Min Yuan, Carla Nelson-Thomas, Matthew Thompson, Russell Carter, Lloyd Litt, Patrick Montgomery, Karl Wimmer

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474563

KEYWORDS: Optical proximity correction, Lithography, Reticles, Model-based design, Semiconducting wafers, Photomasks, 193nm lithography, Optical lithography, Lithographic illumination, Data modeling

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Proceedings Article | 30 July 2002 Paper

Monte Carlo method for highly efficient and accurate statistical lithography simulations

Sergei Postnikov, Kevin Lucas, Karl Wimmer, Vladimir Ivin, Andrey Rogov

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474492

KEYWORDS: Monte Carlo methods, Critical dimension metrology, Lithography, Photomasks, Semiconducting wafers, Data modeling, Photoresist processing, Error analysis, Computer simulations, Reflectivity

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Recent years have shown a strong increase in the use of statistical lithography error analysis for process tuning and in making technology choices. Simulation has shown it can play an important role in this area by accurately predicting experimental critical dimension (CD) distributions. Earlier statistical lithography simulation work was based on the Response Surface Methodology. The response surface is built by simulating CD dependence on input lithography process variables of interest such as focus, dose, mask CD, resist thickness, etc. The process parameters are then sampled from the Gaussian distribution to generate the distribution of the resulting resist CDs. When a large number of input parameters are being considered in order to describe the important experimental variations, the computational runtime is rapidly increased due to the requirements to fully simulate an (N+1)-dimensional response surface, where N is the number of input parameters. The work we present here has improved the speed of statistical lithography simulations through the use of Monte Carlo technique. With this technique, the runtime of the simulations is independent of the number of input parameters. The technique can be used for 1D or 2D simulations. We present results benchmarked with 130 nm process data showing the usefulness, runtime improvements and accuracy of this method. We have also used Variable Threshold Resist model (VTRM) in conjunction with the Monte Carlo technique. VTRM was calibrated against experimental focus-exposure matrices at varying line width and pitch. The use of VTRM greatly improves the accuracy of the statistical results by the virtue of establishing a good fit to the experimental data, which can be quantified by the root mean squares of residuals. VTRM also significantly speeds up the computation, since it uses only aerial image calculation as opposed to full resist modeling. Simulation results produced by using VTRM closely match the experimental results through a range of pitches, mask line widths and various illumination conditions.

Proceedings Article | 16 July 2002 Paper

Lithographic process window analysis by statistical means

Anatoly Bourov, Sergei Postnikov, Kevin Lucas

Proceedings Volume 4689, (2002) https://doi.org/10.1117/12.473487

KEYWORDS: Critical dimension metrology, Semiconducting wafers, Lithography, Statistical analysis, Photomasks, Error analysis, Control systems, Data modeling, Software development, Monte Carlo methods

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Proceedings Article | 24 August 2001 Paper

Mechanistic understanding of line-end shortening

Michael Stewart, Gerard Schmid, Sergei Postnikov, C. Grant Willson

Proceedings Volume 4345, (2001) https://doi.org/10.1117/12.436844

KEYWORDS: Diffusion, Polymers, Photomasks, Semiconducting wafers, Imaging systems, Photoresist materials, Diffraction, Printing, Image acquisition, Lithography

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Proceedings Article | 22 August 2001 Paper

Impact of optimized illumination upon simple lambda-based design rules for low-K1 lithography

Sergei Postnikov, Kevin Lucas, Karl Wimmer

Proceedings Volume 4344, (2001) https://doi.org/10.1117/12.436807

KEYWORDS: Lithography, Lithographic illumination, 193nm lithography, Manufacturing, Optical lithography, Process control, Reticles, Logic, Semiconducting wafers, Transistors

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Proceedings Article | 23 June 2000 Paper

Study of acid transport using IR spectroscopy and SEM

Michael Stewart, Mark Somervell, Hoang Tran, Sergei Postnikov, C. Grant Willson

Proceedings Volume 3999, (2000) https://doi.org/10.1117/12.388353

KEYWORDS: Diffusion, Scanning electron microscopy, Sensors, Polymers, Infrared spectroscopy, Glasses, Photoresist materials, Information operations, Temperature metrology, Silicon

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Proceedings Article | 2 June 2000 Paper

Re-evaluating simple lambda-based design rules for low-K1 lithography process control

Sergei Postnikov, Kevin Lucas, Bernard Roman, Karl Wimmer

Proceedings Volume 3998, (2000) https://doi.org/10.1117/12.386458

KEYWORDS: Optical proximity correction, Lithography, Process control, Optical lithography, Transistors, Semiconducting wafers, Printing, Manufacturing, Logic, Semiconductors

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Proceedings Article | 14 June 1999 Paper

CD error budget analysis for 0.18-um inlaid trench lithography

Sergei Postnikov, John Sturtevant, Kevin Lucas, Chong-Cheng Fu

Proceedings Volume 3677, (1999) https://doi.org/10.1117/12.350827

KEYWORDS: Critical dimension metrology, Error analysis, Lithography, Optical lithography, Reticles, Etching, Photomasks, Phase shifts, Photoresist materials, Process control

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Proceedings Article | 29 June 1998 Paper

Top surface imaging through silylation

Sergei Postnikov, Mark Somervell, Clifford Henderson, Steven Katz, C. Grant Willson, Jeff Byers, Anwei Qin, Qinghuang Lin

Proceedings Volume 3333, (1998) https://doi.org/10.1117/12.312370

KEYWORDS: Etching, Lithography, Diffusion, Photoresist materials, Image processing, Semiconducting wafers, Photoresist processing, Oxygen, Absorbance, Silicon

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Showing 5 of 27 publications

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